PM8313 datasheet(84/192 Pages) PMC

84 / 192 page

PM8313 D3MX

DATA SHEET

PMC-920702

ISSUE 5

M13 MULTIPLEXER

Bit

Type

Function

Default

Bit7

R/W

DLOS

Bit6

R/W

DLCV

Bit5

Unused

Bit4

R/W

DFERR

Bit3

R/W

DMERR

Bit2

R/W

DCPERR

Bit1

R/W

DPERR

Bit0

R/W

DFEBE

DFEBE:

The DFEBE controls the insertion of far end block errors in the outgoing DS3

stream. When DFEBE is set to a logic 1, and the C-bit parity application is

enabled, the three C-bits in M-subframe 4 are set to a logic 0.

DPERR:

The DPERR controls the insertion of parity errors (P-bit errors) in the

outgoing DS3 stream. When DPERR is set to a logic 1, the P-bits are

inverted before insertion in the DS3 stream.

DCPERR:

The DCPERR controls the insertion of C-bit parity errors in the outgoing DS3

stream. When DCPERR is set to a logic 1, and the C-bit parity application is

enabled, the three C-bits in M-subframe 3 are inverted before insertion in the

DS3 stream.

DMERR:

The DMERR controls the insertion of framing errors (M-bit errors) in the

outgoing DS3 stream. When DMERR is set to a logic 1, the M-bits are

inverted before insertion in the DS3 stream.

DFERR:

The DFERR controls the insertion of framing errors (F-bit errors) in the

outgoing DS3 stream. When DFERR is set to a logic 1, the F-bits are

inverted before insertion in the DS3 stream.

PM8313 Datasheet(PDF) 84 Page - PMC-Sierra, Inc

PM8313 Datasheet(HTML) 84 Page - PMC-Sierra, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL