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LAN9250 Datasheet(PDF) 30 Page - Microchip Technology |
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LAN9250 Datasheet(HTML) 30 Page - Microchip Technology |
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30 / 421 page  LAN9250 DS00001913A-page 30 2015 Microchip Technology Inc. FIGURE 5-1: REGISTER ADDRESS MAP RX Data FIFO Port & Alias Ports TX Data FIFO Port & Alias Ports RX Status FIFO Port RX Status FIFO PEEK TX Status FIFO Port TX Status FIFO PEEK 000h 020h 040h 044h 048h 04Ch 100h 03Ch 01Ch 1588 Registers 18Ch Host MAC Indirect Access 0A4h 0A8h TX & RX Data FIFO Configuration 080h 068h 0ACh Host MAC EEE 0BCh Test 0E0h 0FCh GPIO 1E0h 1E8h 3FFh Interrupts 054h 05Ch EEPROM 1B4h 1B8h Host MAC 0A0h GP Timer and Free Run Counter 09Ch 08Ch LED Configuration 1BCh Host MAC 0B0h Note: Not all registers are shown 1C0h |
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