| Electronic Components Datasheet Search |
|
LAN9250 Datasheet(PDF) 45 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
LAN9250 Datasheet(HTML) 45 Page - Microchip Technology |
|
45 / 421 page ![]() 2015 Microchip Technology Inc. DS00001913A-page 45 LAN9250 6.3.2 WAKE-UP (PME) NOTIFICATION A simplified diagram of the logic that controls the PME output pin and PME interrupt can be seen in Figure 6-1. The PME module handles the latching of the Host MAC Wake On Status (WOL_STS) bit and the PHY Energy-Detect Status (ED_STS) bit in the Power Management Control Register (PMT_CTRL). This module also masks the status bits with the corresponding enable bits (Wake-On-Enable (WOL_EN) and Energy- Detect Enable (ED_EN) ) and combines the results together to generate the Power Management Interrupt Event (PME_INT) status bit in the Interrupt Status Register (INT_STS). The PME_INT status bit is then masked with the Power Management Event Interrupt Enable (PME_INT_EN) bit and combined with the other interrupt sources to drive the IRQ output pin. In addition to generating interrupt events, the PME event can also drive the PME output pin to indicate wake-up events exclusively. The PME event is enabled with the PME Enable (PME_EN) in the Power Management Control Register (PMT_CTRL), The PME output pin characteristics can be configured via the PME Buffer Type (PME_TYPE), PME Indi- cation (PME_IND) and PME Polarity (PME_POL) bits of the Power Management Control Register (PMT_CTRL). These bits allow the PME output pin to be open-drain, active high push-pull or active-low push-pull and configure the output to be continuous, or pulse for 50 ms. In system configurations where the PME output pin is shared among multiple devices (wired ORed), the WOL_STS and ED_STS bits within the PMT_CTRL register can be read to determine which device is driving the PME signal. When the PM_WAKE bit of the Power Management Control Register (PMT_CTRL) is set, the PME event will automat- ically wake up the system in certain chip level power modes, as described in Section 6.3.4.2, "Exiting Low Power Modes," on page 48. This is done independent from the values of the PME_EN, PME_POL, PME_IND and PME_TYPE register bits. Note: Note: The PME interrupt status bit (PME_INT) in the INT_STS register is set regardless of the setting of PME_INT_EN. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |