LAN9250 datasheet(10/421 Pages) MICROCHIP

10 / 421 page

LAN9250

DS00001913A-page 10

 2015 Microchip Technology Inc.

3.0

PIN DESCRIPTIONS AND CONFIGURATION

3.1

64-QFN Pin Assignments

FIGURE 3-1:

64-QFN PIN ASSIGNMENTS (TOP VIEW)

Note:

When a “#” is used at the end of the signal name, it indicates that the signal is active low. For example,

RST# indicates that the reset signal is active low.

The buffer type for each signal is indicated in the “Buffer Type” column of the pin description tables in Sec-

tion 3.3, "Pin Descriptions". A description of the buffer types is provided in Section 1.2, "Buffer Types".

Note: Exposed pad (VSS) on bottom of package must be connected to ground with a via field.

(Connect exposed pad to ground with a via field)

VS S

LAN9250

64-QFN

( Top V i ew)

FXLOSEN

REG_EN

FXSDA/FXLOSA/FXSDENA

RESERVED

RST#

D2/AD2/SIO2

D1/AD1/SO/SIO1

VDDIO

LED1/GPIO1/TDI/MNGT1

LED2/GPIO2/E2PSIZE

EESCL/TCK

VDDCR

D6/AD6

D3/AD3/SIO3

EESDA/TMS

IRQ

VDDCR

VDD33

OSCVSS

OSCVDD12

TESTMODE

D8/AD8

D7/AD7

VDDIO

OSCO

OSCI

D13/AD13

D14/AD14

A0/D15/AD15

FIFOSEL

VDDIO

LED0/GPIO0/TDO/MNGT0

LAN9250 Datasheet(PDF) 10 Page - Microchip Technology

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