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LAN9250 Datasheet(PDF) 58 Page - Microchip Technology |
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LAN9250 Datasheet(HTML) 58 Page - Microchip Technology |
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58 / 421 page ![]() LAN9250 DS00001913A-page 58 2015 Microchip Technology Inc. 7.2 Hard-Straps Hard-straps are latched upon Power-On Reset (POR) or pin reset (RST#) only. Unlike soft-straps, hard-straps always have an associated pin and cannot be overridden by the EEPROM Loader. These straps are used as either direct con- figuration values or as register defaults. Table 7-2 provides a list of all hard-straps and their associated pin. These straps, along with their pin assignments are also fully defined in Section 3.0, "Pin Descriptions and Configuration," on page 10. EEE_enable_strap_1 Host MAC Energy Efficient Ethernet Enable Strap: Config- ures the default value of the Host MAC Energy Efficient Ether- net (HMAC_EEE_ENABLE) bit in the Section 11.15.1, "Host MAC Control Register (HMAC_CR)," on page 193. Refer to the respective register definition sections for addi- tional information. 1b EEE_enable_strap_1 (cont.) PHY Energy Efficient Ethernet Enable Strap: This strap affects the default value of the following register bits: • PHY Energy Efficient Ethernet Enable (PHYEEEEN) bit of the PHYEDPD NLP / Crossover Time / EEE Configura- tion Register (PHY_EDPD_CFG) • 100BASE-TX EEE bit of the PHY EEE Capability Regis- ter (PHY_EEE_CAP) • 100BASE-TX EEE bit of the PHY EEE Advertisement Register (PHY_EEE_ADV) Note: This has no effect when the PHY is in 100BASE-FX mode. Refer to the respective register definition sections for addi- tional information. 1b TABLE 7-2: HARD-STRAP CONFIGURATION STRAP DEFINITIONS Strap Name Description Pins eeprom_size_strap EEPROM Size Strap: Configures the EEPROM size range. A low selects 1K bits (128 x 8) through 16K bits (2K x 8). A high selects 32K bits (4K x 8) through 512K bits (64K x 8). E2PSIZE TABLE 7-1: SOFT-STRAP CONFIGURATION STRAP DEFINITIONS (CONTINUED) Strap Name Description Pin / Default Value |
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