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DS26401 Datasheet(PDF) 202 Page - Dallas Semiconductor |
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DS26401 Datasheet(HTML) 202 Page - Dallas Semiconductor |
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202 / 309 page ![]() DS26401 Octal T1/E1/J1 Framer 202 10.16.2 Receive Packet Bytes Available The lower 6 bits of the Receive Packet Bytes Available register indicates the number of bytes (0 through 64) that can be read from the receive FIFO. The value indicated by this register informs the host as to how many bytes can be read from the receive FIFO without going past the end of a message. This value will refer to one of four possibilities, the first part of a packet, the continuation of a packet, the last part of a packet, or a complete packet. After reading the number of bytes indicated by this register the host then checks the HDLC Status register for detailed message status. If the value in the RHPBA register refers to the beginning portion of a message or continuation of a message then the MSB of the RHPBA register will return a value of 1. This indicates that the host may safely read the number of bytes returned by the lower 6 bits of the RHPBA register but there is no need to check the information register since the packet has not yet terminated (successfully or otherwise). Register Name: RHPBA Register Description: Receive HDLC Packet Bytes Available Register Register Address: 0B5h + (200h x n) : where n = 0 to 7, for Ports 1 to 8 Bit # 7 6 5 4 3 2 1 0 Name MS RPBA6 RPBA5 RPBA4 RPBA3 RPBA2 RPBA1 RPBA0 Default 0 0 0 0 0 0 0 0 Bits 0 to 6 / Receive FIFO Packet Bytes Available Count (RPBA0 to RPBA6). RPBA0 is the LSB. Bit 7 / Message Status (MS) 0 = Bytes indicated by RPBA0 through RPBA6 are the end of a message. Host must check the HDLC Status register for details. 1 = Bytes indicated by RPBA0 through RPBA6 are the beginning or continuation of a message. The host does not need to check the HDLC Status. |
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