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TDA2EX Datasheet(PDF) 136 Page - Texas Instruments

Part # TDA2EX
Description  SoC for Advanced Driver Assistance Systems (ADAS) 17mm Package (CBD Package) Silicon Revision 2.0
PDF  391 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TDA2EX Datasheet(HTML) 136 Page - Texas Instruments

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TDA2EG-17
SPRS969B – AUGUST 2016 – REVISED JUNE 2017
www.ti.com
Submit Documentation Feedback
Product Folder Links: TDA2EG-17
Specifications
Copyright © 2016–2017, Texas Instruments Incorporated
5.9.1.1.3 Timing Parameters and Board Routing Analysis
The timing parameter values specified in this data manual do not include delays by board routes. As a
good board design practice, such delays must always be taken into account. Timing values may be
adjusted by increasing/decreasing such delays. TI recommends using the available I/O buffer information
specification (IBIS) models to analyze the timing characteristics correctly. To properly use IBIS models to
attain accurate timing analysis for a given system, see the Using IBIS Models for timing Analysis
application report (literature number SPRA839). If needed, external logic hardware such as buffers may be
used to compensate any timing differences.
5.9.2
Interface Clock Specifications
5.9.2.1
Interface Clock Terminology
The interface clock is used at the system level to sequence the data and/or to control transfers accordingly
with the interface protocol.
5.9.2.2
Interface Clock Frequency
The two interface clock characteristics are:
•
The maximum clock frequency
•
The maximum operating frequency
The interface clock frequency documented in this document is the maximum clock frequency, which
corresponds to the maximum frequency programmable on this output clock. This frequency defines the
maximum limit supported by the Device IC and does not take into account any system consideration
(PCB, peripherals).
The system designer will have to consider these system considerations and the Device IC timing
characteristics as well to define properly the maximum operating frequency that corresponds to the
maximum frequency supported to transfer the data on this interface.
5.9.3
Power Supply Sequences
This section describes the power-up and power-down sequence required to ensure proper device
operation. The power supply names described in this section comprise a superset of a family of
compatible devices. Some members of this family will not include a subset of these power supplies and
their associated device modules. Refer to the Section 4.2, Pin Attributes of the Section 4, Terminal
Configuration and Functions to determine which power supplies are applicable.



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