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DS3141 Datasheet(PDF) 81 Page - Dallas Semiconductor

Part # DS3141
Description  Single/Dual/Triple/Quad DS3/E3 Framers
PDF  88 Pages
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Manufacturer  DALLAS [Dallas Semiconductor]
Direct Link  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS3141 Datasheet(HTML) 81 Page - Dallas Semiconductor

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DS3141/DS3142/DS3143/DS3144 Single/Dual/Triple/Quad DS3/E3 Framers
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11.3 JTAG Interface Timing
Table 11-D. JTAG Interface Timing
(VDD = 3.3V
±5%, TA = -40°C to +85°C.) (Figure 11-6)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
JTCLK Clock Period
t1
1000
ns
JTCLK Clock High/Low Time
t2/t3
(Note 12)
50
500
ns
JTCLK to JTDI, JTMS Setup Time
t4
50
ns
JTCLK to JTDI, JTMS Hold Time
t5
50
ns
JTCLK to JTDO Delay
t6
2
50
ns
JTCLK to JTDO High-Z Delay
t7
2
50
ns
JTRST Width Low Time
t8
100
ns
Note 12: Clock can be stopped high or low.
Figure 11-6. JTAG Interface Timing Diagram
JTCLK
t1
JTD0
t4
t5
t2
t3
t7
JTDI, JTMS
t6
JTRST
t8



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