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DS3141 Datasheet(PDF) 20 Page - Dallas Semiconductor |
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DS3141 Datasheet(HTML) 20 Page - Dallas Semiconductor |
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20 / 88 page ![]() DS3141/DS3142/DS3143/DS3144 Single/Dual/Triple/Quad DS3/E3 Framers 20 of 88 7.4 Error Insertion Errors can be created in the transmit overhead and line coding for diagnostic purposes. These errors do not cause any loss of data when created. The T3E3EIC error insertion register contains all the control bits to create errors. The TMEI input pin can also be used to create errors. 7.5 Loopbacks 7.5.1 Line Loopback The line loopback connects the incoming DS3/E3 data (RCLK, RPOS/RNRZ, and RNEG inputs) directly back to the transmit side (TCLK, TPOS/TNRZ, and TNEG outputs). When this loopback is enabled, the incoming data continues to pass through the receive framer block, but the output data from the transmit formatter is ignored. See Figure 1-1 for a visual description of this loopback. Setting the LLB bit in the MC2 register activates the line loopback. 7.5.2 Diagnostic Loopback The diagnostic loopback sends the outgoing DS3/E3 data directly back to the receive side. When this loopback is enabled, the incoming receive data at RCLK, RPOS, and RNEG is ignored. See Figure 1-1 for a visual description of this loopback. During diagnostic loopback the device can simultaneously generate AIS at the TCLK, TPOS, and TNEG outputs, while regular traffic is looped back to the receiver. This feature keeps the diagnostic signal that is being looped back from disturbing downstream equipment. Setting the DLB bit in the MC2 register activates the diagnostic loopback. 7.5.3 Payload Loopback The payload loopback sends the DS3/E3 payload from the receive framer back to the transmit formatter. When this loopback is enabled, the incoming receive data continues to be present on the RDAT pin, but the transmit data on the TDAT pin is ignored. During payload loopback, the TSOF and TDEN signals are realigned to the receive frame, and the signals at TOH and TOHEN are active and can still overwrite any bit position. See Figure 1-1 for a visual description of this loopback. During payload loopback TSOF, TDEN, TOHEN, and TOH are aligned to the ROCLK signal. When PLB and DLB are both set, diagnostic loopback takes precedence. Setting the PLB bit in the MC2 register activates payload loopback. 7.5.4 BERT and Loopback Interaction Table 7-A describes how the payload bits move through the device with various combinations of BERT modes and loopbacks active. The BERT mode is set in the BM[1:0] bits in the BCR1 register. The BERT is enabled when the BENA bit is set in the BCR1 register. Table 7-B describes how the overhead bits move through the device with various combinations of BERT modes and loopbacks active. Table 7-A. BERT/Loopback Interaction—Payload Bits CONFIGURATION BITS BITS AT PAYLOAD BIT POSITIONS DLB LLB PLB BM [1:0] From RPOS/RNEG To: From TDAT To: From BERT To: 0 0 0 0X BERT and RDAT Not used TPOS/TNEG 0 0 0 1X Not used BERT and TPOS/TNEG RDAT 1 0 0 0X Not used Not used TPOS/TNEG, BERT, and RDAT 1 0 0 1X Not used BERT and TPOS/TNEG RDAT 0 1 0 0X TPOS/TNEG, RDAT, and BERT Not used Not used 0 1 0 1X TPOS/TNEG BERT RDAT 0 0 1 00 TPOS/TNEG and RDAT and BERT Not used Not used 0 0 1 01 RDAT and BERT Not used TPOS/TNEG 0 0 1 1X TPOS/TNEG BERT RDAT |
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