DS3141 datasheet(27/88 Pages) DALLAS

27 / 88 page

DS3141/DS3142/DS3143/DS3144 Single/Dual/Triple/Quad DS3/E3 Framers

27 of 88

MC5

Master Configuration Register 5

05h

Bit #

Name

RNEGI

RPOSI

RCLKI

TNEGH

TPOSH

TNEGI

TPOSI

TCLKI

Default

Bit 0: TCLK Invert Enable (TCLKI)

0 = do not invert the TCLK signal (normal mode)

1 = invert the TCLK signal (inverted mode)

Bit 1: TPOS/TNRZ Invert Enable (TPOSI)

0 = do not invert the TPOS/TNRZ signal (normal mode)

1 = invert the TPOS/TNRZ signal (inverted mode)

Bit 2: TNEG Invert Enable (TNEGI)

0 = do not invert the TNEG signal (normal mode)

1 = invert the TNEG signal (inverted mode)

Bit 3: TPOS/TNRZ Force-High Enable (TPOSH). The TPOS/TNRZ pin can be forced low by setting both the

TPOSH and TPOSI control bits.

0 = allow normal transmit data to appear at the TPOS/TNRZ pin (normal mode)

1 = force the TPOS/TNRZ signal high (force high mode, can be inverted)

Bit 4: TNEG Force-High Enable (TNEGH). The TNEG pin can be forced low by setting both the TNEGH and

TNEGI control bits.

0 = allow normal transmit data to appear at the TNEG pin (normal mode)

1 = force the TNEG signal high (force high mode, can be inverted)

Bit 5: RCLK Invert Enable (RCLKI)

0 = do not invert the RCLK signal (normal mode)

1 = invert the RCLK signal (inverted mode)

Bit 6: RPOS/RNRZ Invert Enable (RPOSI)

0 = do not invert the RPOS/RNRZ signal (normal mode)

1 = invert the RPOS/RNRZ signal (inverted mode)

Bit 7: RNEG/RLCV Invert Enable (RNEGI)

0 = do not invert the RNEG/RLCV signal (normal mode)

1 = invert the RNEG/RLCV signal (inverted mode)

ISR1

Interrupt Status Register 1

06h

Bit #

Name

N/A

INT4

INT3

INT2

INT1

Default

—

This register is a global resource and is mapped into address 06h in every framer in the device. In both interrupt-based and polling-based

device servicing strategies, the host processor should read this register first to determine which framers require servicing.

Bit 0: Interrupt 1 (INT1). This bit is set when framer 1 is driving the

INT pin.

Bit 1: Interrupt 2 (INT2). This bit is set when framer 2 is driving the

INT pin.

Bit 2: Interrupt 3 (INT3). This bit is set when framer 3 is driving the

INT pin.

Bit 3: Interrupt 4 (INT4). This bit is set when framer 4 is driving the

INT pin.

DS3141 Datasheet(PDF) 27 Page - Dallas Semiconductor

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