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FXLS93421 Datasheet(PDF) 152 Page - NXP Semiconductors

Part # FXLS93421
Description  Dual channel inertial sensor
PDF  254 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FXLS93421 Datasheet(HTML) 152 Page - NXP Semiconductors

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NXP Semiconductors
FXLS9xxxx
Dual channel inertial sensor
aaa-030652
current
transmitted
slave 4
current sensed,
slave 4
current
transmitted
slave 3
current sensed,
slave 3
current
transmitted
slave 2
current sensed,
slave 2
current
transmitted
slave 1
current sensed,
slave 1
current sensed,
at master
Voltage
VLOW
tDISC_Bittime
2*IRESP = iDISC_Peak
2*IRESP
slave 1 accepts addr `0100'
tSTART_DISC_RSP
0
0
0
0
tPER_DISC
2*IRESP
2*IRESP
2*IRESP
IRESP
2*IRESP
2*IRESP
slave 3 accepts addr `0010'
slave 4 accepts addr `0001'
slave 2 accepts addr `0011'
tDISC_Ramp_RSP
2*IRESP
tDISC_Ramp_RSP + tDISC_Idle_RSP
4*Iq
4*Iq
3*Iq
3*Iq
2*Iq
2*Iq
Iq
Iq
0
Figure 68. DSI3 discovery mode timing diagram
12.3 DSI3 command and response mode
DSI3 command and response mode is the main communication method used for
initialization of the device.
12.3.1 DSI3 command and response mode command reception
Command and response mode data packets are exchanged between a single master
and a single slave. The primary purpose of command and response transactions are to
read from and write to registers within the device memory structure.
An example command and response mode command is shown in Figure 69. The
command consists of 32 bits of data broken up into multiple fields as described in
Section 12.3.1.2.
aaa-030653
BUS_I
PA
[3]
PA
[0]
PA[3:0]
CMD
[3]
CMD
[0]
CMD[3:0]
ED[7:0]
ED
[7]
RD
[7]
ED
[0]
RD[7:0]
RD
[0]
CRC
[7]
CRC[7:0]
CRC
[0]
Figure 69. Command and response mode example command
FXLS9xxxx
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 6 — 8 February 2021
152 / 254



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