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FXLS93421 Datasheet(PDF) 181 Page - NXP Semiconductors |
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FXLS93421 Datasheet(HTML) 181 Page - NXP Semiconductors |
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181 / 254 page ![]() NXP Semiconductors FXLS9xxxx Dual channel inertial sensor aaa-030674 external PSI5 initialization phase 1 tPSI5Delay_Before_MasterSync_Pulses tPSI5_INIT1 sync. pulses ignored offset cancellation LPF init tPSI5ST_START self test tST sync pulses ignored tRS_PM no PM entry PM entry programming mode self test repeat (if necessary) ST_RPT * tST PSI5 initialization phase 2 tPSI5_INIT2 PSI5 initialization phase 3 tPSI5_INIT3 PSI5 normal mode programming mode entry 1) Min. 31 sync pulses 2) PME command otherwise sync pulses ignored tPME Figure 89. PSI5 initialization timing, synchronous mode aaa-030675 offset cancellation LPF init tPSI5ST_START self test tST sync pulses ignored tRS_PM no PM entry PM entry programming mode self test repeat (if necessary) ST_RPT * tST PSI5 initialization phase 2 tPSI5_INIT2 tASYNC PSI5 initialization phase 1 tPSI5_INIT1 PSI5 initialization phase 3 tPSI5_INIT3 PSI5 normal mode programming mode entry 1) Min. 31 sync pulses 2) PME command otherwise sync pulses ignored tPME Figure 90. PSI5 initialization timing, asynchronous mode 13.4.1 PSI5 initialization phase 1 During PSI5 initialization phase 1, the device begins internal initialization and self-checks, but transmits no data. Initialization begins with this sequence, shown in Figure 89: 1. Internal delay to ensure analog circuitry has stabilized (tPOR_PSI5) 2. Offset cancellation low-pass filter initialization begins (tPSI5ST_START) 3. Monitor for the Programming Mode Entry Sequence (tPME) 4. If the Programming Mode Entry Sequence is not detected, the device enters Initialization Phase 2 (tPSI5_INIT2) 13.4.2 PSI5 initialization phase 2 During PSI5 initialization phase 2, the device continues its internal selfchecks and transmits the PSI5 initialization phase 2 data. Initialization data is transmitted using the initialization data codes and IDs specified in Table 264, and in the order shown in Table 265. FXLS9xxxx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 6 — 8 February 2021 181 / 254 |
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