CEC1712 datasheet(186/338 Pages) MICROCHIP

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CEC1712

DS00003416C-page 186

 2020-2021 Microchip Technology Inc.

17.5

Signal Description

There are no external signals.

17.6

Host Interface

The registers defined for the Real Time Clock are accessible by the various hosts as indicated in Section 3.2, "Block

Overview and Base Addresses".

17.7

Power, Clocks and Resets

This section defines the Power, Clock, and Reset parameters of the block.

17.7.1

POWER DOMAINS

17.7.2

CLOCKS

17.7.3

RESETS

17.8

Interrupts

TABLE 17-1:

POWER SOURCES

Name

Description

VBAT

This power well sources all of the internal registers and logic in this block.

VTR_CORE

This power well sources only host register accesses. The block continues

to operate internally while this rail is down.

TABLE 17-2:

CLOCKS

Name

Description

32KHz

This clock input drives all internal logic, and will be present at all times

that the VBAT well is powered.

TABLE 17-3:

RESET SIGNALS

Name

Description

RESET_VBAT

This reset signal is used in the RESET_RTC signal to reset all of the reg-

isters and logic in this block. It directly resets the Soft Reset bit in the RTC

Control Register.

RESET_RTC

This reset signal resets all of the registers and logic in this block, except

for the Soft Reset bit in the RTC Control Register. It is triggered by

RESET_VBAT, but can also be triggered by a SOFT_RESET from the

RTC Control Register.

RESET_SYS

This reset signal is used to inhibit the bus communication logic, and iso-

lates this block from VTR_CORE powered circuitry on-chip. Otherwise it

has no effect on the internal state.

SOFT_RESET

This is the block reset and resets all the registers and logic in the block

TABLE 17-4:

SYSTEM INTERRUPTS

Source

Description

RTC

This interrupt source for the SIRQ logic is generated when any of the fol-

lowing events occur:

• Update complete. This is triggered, at 1-second intervals, when the

Time register updates have completed

• Alarm. This is triggered when the alarm value matches the current

time (and date, if used)

• Periodic. This is triggered at the chosen programmable rate

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