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CEC1712 Datasheet(PDF) 103 Page - Microchip Technology

Part # CEC1712
Description  Cryptographic Embedded Controller
PDF  338 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

CEC1712 Datasheet(HTML) 103 Page - Microchip Technology

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 2020-2021 Microchip Technology Inc.
DS00003416C-page 103
CEC1712
15:9 HARDWARE_FLOW_CONTROL_DEVICE
This is the device that is connected to this channel as its Hardware
Flow Control master.
The Flow Control Interface is a bus with each master concatenated
onto it. This selects which bus index of the concatenated Flow Con-
trol Interface bus is targeted towards this channel.
R/W
0h
RESET
8 TRANSFER_DIRECTION
This determines the direction of the DMA Transfer.
1=Data Packet Read from MEMORY_START_ADDRESS followed
by Data Packet Write to DEVICE_ADDRESS
0=Data Packet Read from DEVICE_ADDRESS followed by Data
Packet Write to MEMORY_START_ADDRESS
R/W
0h
RESET
7:6 Reserved
RES
-
-
5BUSY
This is a status signal.
1=The DMA Channel is busy (FSM is not IDLE)
0=The DMA Channel is not busy (FSM is IDLE)
R0h
RESET
4:3 TEST
R
0h
RESET
2DONE
This is a status signal. It is only valid while RUN is Enabled. This is
the inverse of the DMA Channel Control:Busy field, except this is
qualified with the DMA Channel Control:Run field.
1=Channel is done
0=Channel is not done or it is OFF
R0h
RESET
1REQUEST
This is a status field.
1=There is a transfer request from the Master Device
0=There is no transfer request from the Master Device
R0h
RESET
0 RUN
This is a control field. It only applies to Hardware Flow Control
mode.
1=This channel is enabled and will service transfer requests
0=This channel is disabled. All transfer requests are ignored
R/W
0h
RESET
Offset
10h
Bits
Description
Type
Default
Reset
Event



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