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TAS2780 Datasheet(PDF) 49 Page - Texas Instruments |
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TAS2780 Datasheet(HTML) 49 Page - Texas Instruments |
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49 / 97 page ![]() 8.9.39 BOP_CFG5 (page=0x00 address=0x22) [reset=4Ch] Bit Field Type Reset Description 7-0 BOP_TH3[7:0] RW 4Ch BOP level 3 threshold (V) Setting BOP_SRC=0 (VBAT1S Source) BOP_SRC=1 (PVDD Source) 00h 2.7 5.5 01h 2.75 5.55 02h 2.8 5.6 ..... ..... ..... 38h 5.5 8.3 39h Reserved 8.35 ..... Reserved ..... 5Ah Reserved 10 ..... Reserved ..... FDh Reserved 18.15 FEh Reserved 18.2 FFh Reserved 18.25 8.9.40 BOP_CFG6 (page=0x00 address=0x23) [reset=20h] Bit Field Type Reset Description 7-5 BOP_HT3[2:0] RW 1h BOP level 3 hold time 0h = 0 ms 1h = 10 ms 2h = 100 ms 3h = 250 ms 4h = 500ms 5h = 1000 ms 6h = 2000 ms 7h = Infinte (This can be exited using BOP_HLD_CLR bit) 4 BOP_DIS3 RW 0h BOP level 3 0b = Enabled 1b = Disabled 3-0 BOP_STAT_STATE[3:0] R 0h BOP current state - set BOP_STAT_HLD bit high to hold update and valid readack 0h = Idle 1h = Attacking Level 3 2h = Attacking Level 2 3h = Attacking Level 1 4h = Attacking Level 0 5h = Holding Level 3 6h = Holding Level 2 7h = Holding Level1 8h = Holding Level 0 9h = Releasing Level 3 Ah = Releasing Level 2 Bh = Releasing Level 1 Ch = Releasing Level 0 Dh-Fh = Reserved www.ti.com TAS2780 SLOSE75A – FEBRUARY 2022 – REVISED JUNE 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 49 Product Folder Links: TAS2780 |
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