TAS2780 datasheet(9/97 Pages) TI

9 / 97 page

TA = 25 °C, PVDD = 18 V, VBAT1S = 3.8 V, AVDD = 1.8V, IOVDD =1.8 V, RL = 4Ω + 15µH, fin = 1 kHz, fs = 48 kHz, Gain = 21

dBV, SDZ = 1, NG_EN=0, EN_LLSR=0, PWR_MODE1(2), measured filter free as in Section 7 (unless otherwise noted).

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VBAT1S Internal LDO

Undervoltage Lockout

Threshold

UVLO is asserted

TYPICAL CURRENT CONSUMPTION

Hardware Shutdown

SDZ = 0, PVDD

0.05

µA

SDZ = 0, VBAT1S

0.01

SDZ = 0, AVDD

0.14

SDZ = 0, IOVDD

0.005

Software Shutdown

All Clocks Stopped, PVDD

0.05

µA

All Clocks Stopped, VBAT1S

0.5

All Clocks Stopped, AVDD

10.2

All Clocks Stopped, IOVDD

0.55

Noise Gate Mode

fs = 48 kHz, PVDD

0.012

fs = 48 kHz, VBAT1S

0.13

fs = 48 kHz, AVDD

fs = 48 kHz, IOVDD

0.01

Idle Mode - PWR_MODE1

fs = 48 kHz, PVDD

0.04

fs = 48 kHz, VBAT1S

2.2

fs = 48 kHz, AVDD, IV Sense = Enabled

9.2

fs = 48 kHz, AVDD, IV Sense = Disabled

6.8

fs = 48 kHz, IOVDD

0.02

Idle Mode - PWR_MODE2

fs = 48 kHz, PVDD

fs = 48 kHz, AVDD, IV Sense = Enabled

9.2

fs = 48 kHz, AVDD, IV Sense = Disabled

6.8

fs = 48 kHz, IOVDD

0.02

Idle Mode - PWR_MODE0

fs = 48 kHz, PVDD

2.28

fs = 48 kHz, VBAT1S

2.1

fs = 48 kHz, AVDD, IV Sense = Enabled

9.2

fs = 48 kHz, AVDD, IV Sense = Disabled

6.8

fs = 48 kHz, IOVDD

0.02

(1)

PWR_MODE0: CDS_MODE=10, VBAT1S_MODE=0

(2)

PWR_MODE1: CDS_MODE=00, VBAT1S_MODE=0

(3)

PWR_MODE2: CDS_MODE=11, VBAT1S_MODE=1

(4)

PWR_MODE3: CDS_MODE=01, VBAT1S_MODE=0

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TAS2780

SLOSE75A – FEBRUARY 2022 – REVISED JUNE 2022

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