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TAS2780 Datasheet(PDF) 71 Page - Texas Instruments |
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TAS2780 Datasheet(HTML) 71 Page - Texas Instruments |
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71 / 97 page  8.9.112 SDOUT_HIZ_9 (page=0x01 address=0x45) [reset=00h] Bit Field Type Reset Description 7 SDOUT_FORCE_0_CNT_EN RW 0h Control over sending "0" to un-used slots 0h = All unused slots will have 'Hi-Z' transmitted 1h = Unused slots can transmit '0' base on programming in registers 0x3D to 0x44 of Page 0x01 6-0 Reserved RW 00h Reserved 8.9.113 TG_EN (page=0x01 address=0x47) [reset=AB] Bit Field Type Reset Description 7-2 Reserved R 2Ah Reserved 1 TG_TH2 RW 1h Thermal threshold 2 0h = Disabled 1h = Enabled 0 TG_TH1 RW 1h Thermal threshold 1 0h = Disabled 1h = Enabled 8.9.114 EDGE_CTRL (page=0x01 address=0x4C) [reset=00h] Bit Field Type Reset Description 7-3 Reserved 0h Reserved 2-1 EDGE_CTRL[1:0] RW 0h Output slew rate 00b = PVDD < 20V - fast slew rate, PVDD > 20V - slow slew rate 01b = Reserved 10b = Reserved 11b = Slow slew rate for full range of PVDD 0 Reserved RW 0h Reserved 8.9.115 DG_DC_VAL1 (page=0x04 address=0x08) [reset=40h] Programmable DG bits for a DC_VAL(dBFS) desired level. Bit Field Type Reset Description 7-0 DG_DC_VAL [31:24] RW 40h dec2hex{256*round[10^(DC_VAL/20)*2^23]} 8.9.116 DG_DC_VAL2 (page=0x04 address=0x09) [reset=26h] Programmable DG bits for a DC_VAL(dBFS) desired level. Bit Field Type Reset Description 7-0 DG_DC_VAL [23:16] RW 26h dec2hex{256*round[10^(DC_VAL/20)*2^23]} 8.9.117 DG_DC_VAL3 (page=0x04 address=0x0A) [reset=40h] Programmable DG bits for a DC_VAL(dBFS) desired level. Bit Field Type Reset Description 7-0 DG_DC_VAL [15:8] RW 40h dec2hex{256*round[10^(DC_VAL/20)*2^23]} 8.9.118 DC_DG_VAL4 (page=0x04 address=0x0B) [reset=00h] Programmable DG bits for a DC_VAL(dBFS) desired level. Bit Field Type Reset Description 7-0 DG_DC_VAL [7:0] RW 00h dec2hex{256*round[10^(DC_VAL/20)*2^23]} www.ti.com TAS2780 SLOSE75A – FEBRUARY 2022 – REVISED JUNE 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 71 Product Folder Links: TAS2780 |
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