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TAS2780 Datasheet(PDF) 6 Page - Texas Instruments |
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TAS2780 Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 97 page ![]() TA = 25 °C, PVDD = 18 V, VBAT1S = 3.8 V, AVDD = 1.8V, IOVDD =1.8 V, RL = 4Ω + 15µH, fin = 1 kHz, fs = 48 kHz, Gain = 21 dBV, SDZ = 1, NG_EN=0, EN_LLSR=0, PWR_MODE1(2), measured filter free as in Section 7 (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT THD+N Total Harmonic Distortion and Noise POUT = 1 W -84 dB POUT = 1 W, fin = 6.667 kHz -84 IMD Inter-Modulation Distortion ITU-R, 19 kHz / 20 kHz, 1: 1: 12.5 W -83 dB VN Idle Channel Noise A-Weighted, 20 Hz - 20 kHz, PWR_MODE0 40 µV A-Weighted, 20 Hz - 20 kHz, PWR_MODE2 (3) 34 A-Weighted, 20 Hz - 20k Hz, PWR_MODE1 32 Idle Channel Noise with Ultrasonic Chirp (100 us duty cycle, 25 ms period) A-Weighted, 20 Hz - 20 kHz, VBAT1S = 5 V, PWR_MODE3 (4), 1 VPeak, Register 0x73 set to E0h 34 FPWM Class-D PWM Switching Frequency Average frequency in Spread Spectrum Mode, CLASSD_SYNC=0 384 kHz Fixed Frequency Mode, CLASSD_SYNC=0 384 Fixed Frequency Mode, CLASSD_SYNC=1, fs = 44.1, 88.2 kHz 352.8 Fixed Frequency Mode, CLASSD_SYNC=1, fs = 48, 96 kHz 384 VOS Output Offset Voltage Idle Mode -1.3 ±0.33 1.3 mV DNR Dynamic Range A-Weighted, -60 dBFS 110 dB A-Weighted, -60 dBFS, PWR_MODE2 109 A-Weighted, -60 dBFS, PWR_MODE0 109 SNR Signal to Noise Ratio A-Weighted, Referenced to 1 % THD+N Output Level 110 dB A-Weighted, Referenced to 1 % THD+N Output Level, PWR_MODE2 110 A-Weighted, Referenced to 1 % THD+N Output Level, PWR_MODE0 109 KCP Click and Pop Performance Idle mode, Into and out of Shutdown, A-weighted 0.8 mV Full Scale Output Voltage fs ≤ 48 kHz 21 dBV Minimum Programmable Gain fs ≤ 48 kHz 11 dBV Maximum Programmable Gain fs ≤ 48 kHz 21 Programmable Output Level Step Size 0.5 dB Mute attenuation Device in Software Shutdown or Muted in Normal Operation 108 dB Chip to Chip Group Delay -1 1 µs PVDD Power Supply Rejection Ratio PVDD = 18 V + 200 mVpp, fripple = 217 Hz 118 dB PVDD = 18 V + 200 mVpp, fripple = 1 kHz 110 PVDD = 18 V + 200 mVpp, fripple = 20 kHz 95 VBAT1S Power Supply Rejection Ratio VBAT1S = 3.8 V + 200 mVpp, fripple = 217 Hz 114 dB VBAT1S = 3.8 V + 200 mVpp, fripple = 1 kHz 110 VBAT1S = 3.8 V + 200 mVpp, fripple = 20 kHz 90 AVDD Power Supply Rejection Ratio AVDD = 1.8 V + 200 mVpp, fripple = 217 Hz 105 dB AVDD = 1.8 V + 200 mVpp, fripple = 1 kHz 104 AVDD = 1.8 V + 200 mVpp, fripple = 20 kHz 87 Power Supply Inter- modulation PVDD, 217 Hz, 100-mVpp, Input f=1kHz @ 400 mW -120 dB VBAT1S,217 Hz, 100-mVpp, Input f=1kHz @ 400 mW -120 AVDD, 217 Hz, 100-mVpp, Input f = 1 kHz @ 400 mW -80 IOVDD 217 Hz, 100-mVpp, Input f = 1 kHz @ 400 mW -120 Turn ON Time from Release of SW Shutdown No Volume Ramping 1.12 ms Volume Ramping 6.7 Turn OFF Time from Assertion of SW Shutdown to Amp Hi-Z No Volume Ramping 0.56 ms Volume Ramping 6 Out of HW Shutdown to First I2C command 1 ms TAS2780 SLOSE75A – FEBRUARY 2022 – REVISED JUNE 2022 www.ti.com 6 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TAS2780 |
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