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DS0128 Datasheet(PDF) 40 Page - Microsemi Corporation

Part # DS0128
Description  IGLOO2 FPGA and SmartFusion2 SoC FPGA
PDF  140 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

DS0128 Datasheet(HTML) 40 Page - Microsemi Corporation

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IGLOO2 FPGA and SmartFusion2 SoC FPGA
Microsemi Proprietary and Confidential DS0128 Datasheet Revision 12.0
30
2.3.5.8 1.8 V LVCMOS
LVCMOS 1.8 is a general standard for 1.8 V applications and is supported in IGLOO2 FPGAs and
SmartFusion2 SoC FPGAs in compliance to the JEDEC specification JESD8-7A.
Minimum and Maximum DC/AC Input and Output Levels Specification
Table 48 •
LVCMOS 2.5 V Transmitter Characteristics for MSIOD Bank (Output and Tristate Buffers)
Output
Drive
Selection
Slew
Control
TDP
TZL
TZH
THZ1
1.
Delay increases with drive strength are inherent to built-in slew control circuitry for simultaneous switching output (SSO)
management.
TLZ1
Unit
–1
–Std
–1
–Std
–1
–Std
–1
–Std
–1
–Std
2 mA
Slow
2.206
2.596
2.678
3.15
2.64
3.106
4.935 5.805
4.74
5.576
ns
4 mA
Slow
1.835
2.159
2.242
2.637
2.256
2.654
5.413 6.368
5.15
6.059
ns
6 mA
Slow
1.709
2.01
2.132
2.508
2.167
2.549
5.813 6.838
5.499
6.469
ns
8 mA
Slow
1.63
1.918
1.958
2.303
2.012
2.367
6.226 7.324
5.816
6.842
ns
12 mA
Slow
1.648
1.939
1.86
2.187
1.921
2.259
6.519 7.669
6.027
7.09
ns
Table 49 •
LVCMOS 1.8 V DC Recommended Operating Conditions
Parameter
Symbol Min
Typ Max
Unit
LVCMOS 1.8 V DC Recommended Operating Conditions
Supply voltage
VDDI
1.710
1.8 1.89
V
Table 50 •
LVCMOS 1.8 V DC Input Voltage Specification
Parameter
Symbol
Min
Max
Unit
DC input logic high (for MSIOD
and DDRIO I/O banks)
VIH (DC)
0.65 × VDDI
1.89
V
DC input logic high (for MSIO
I/O bank)
VIH (DC)
0.65 × VDDI
3.45
V
DC input logic low
VIL (DC)
–0.3
0.35 × VDDI
V
Input current high1
1.
See
Table 24, page 23.
IIH (DC)
–
Input current low1
IIL (DC)
–
Table 51 •
LVCMOS 1.8 V DC Output Voltage Specification
Parameter
Symbol
Min
Max
Unit
DC output logic high
VOH
VDDI – 0.45
V
DC output logic low
VOL
0.45
V
Table 52 •
LVCMOS 1.8 V Minimum and Maximum AC Switching Speed
Parameter
Symbol
Max
Unit Conditions
Maximum data rate (for DDRIO I/O bank)1
1.
Maximum Data Rate applies for Drive Strength 8 mA and above, All Slews.
DMAX
400
Mbps AC loading: 17 pF load, maximum drive/slew
Maximum data rate (for MSIO I/O bank)
DMAX
295
Mbps AC loading: 17 pF load, maximum drive/slew
Maximum data rate (for MSIOD I/O bank)1
DMAX
400
Mbps AC loading: 17 pF load, maximum drive/slew



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