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DS0128 Datasheet(PDF) 63 Page - Microsemi Corporation |
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DS0128 Datasheet(HTML) 63 Page - Microsemi Corporation |
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63 / 140 page ![]() IGLOO2 FPGA and SmartFusion2 SoC FPGA Microsemi Proprietary and Confidential DS0128 Datasheet Revision 12.0 53 AC Switching Characteristics Worst-case commercial conditions: TJ = 85 °C, VDD = 1.14 V, worst-case VDDI. Minimum and Maximum DC/AC Input and Output Levels Specification using LPDDR-LVCMOS 1.8 V Mode Table 148 • LPDDR Receiver Characteristics for DDRIO I/O Bank with Fixed Codes On-Die Termination (ODT) TPY Unit –1 –Std Pseudo differential None 1.568 1.845 ns True differential None 1.588 1.869 ns Table 149 • LPDDR Reduced Drive for DDRIO I/O Bank (Output and Tristate Buffers) TDP TENZL TENZH TENHZ TENLZ Unit –1 –Std –1 –Std –1 –Std –1 –Std –1 –Std Single-ended 2.383 2.804 2.23 2.623 2.229 2.622 2.202 2.591 2.201 2.59 ns Differential 2.396 2.819 2.764 3.252 2.764 3.252 2.255 2.653 2.255 2.653 ns Table 150 • LPDDR Full Drive for DDRIO I/O Bank (Output and Tristate Buffers) TDP TENZL TENZH TENHZ TENLZ Unit –1 –Std –1 –Std –1 –Std –1 –Std –1 –Std Single-ended 2.281 2.683 2.196 2.584 2.195 2.583 2.171 2.555 2.17 2.554 ns Differential 2.298 2.703 2.288 2.692 2.288 2.692 2.593 3.051 2.593 3.051 ns Table 151 • LPDDR-LVCMOS 1.8 V Mode Recommended DC Operating Conditions Parameter Symbol Min Typ Max Unit Supply voltage VDDI 1.710 1.8 1.89 V Table 152 • LPDDR-LVCMOS 1.8 V Mode DC Input Voltage Specification Parameter Symbol Min Max Unit DC input logic high (for MSIOD and DDRIO I/O banks) VIH (DC) 0.65 × VDDI 1.89 V DC input logic high (for MSIO I/O bank) VIH (DC) 0.65 × VDDI 3.45 V DC input logic low VIL (DC) –0.3 0.35 × VDDI V Input current high1 1. See Table 24, page 23. IIH (DC) Input current low1 IIL (DC) Table 153 • LPDDR-LVCMOS 1.8 V Mode DC Output Voltage Specification Parameter Symbol Min Max Unit DC output logic high VOH VDDI – 0.45 V DC output logic low VOL 0.45 V |
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