DS0128 datasheet(11/140 Pages) MICROSEMI

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Revision History

Microsemi Proprietary and Confidential DS0128 Datasheet Revision 12.0

Revision History

The revision history describes the changes that were implemented in the document. The changes are

listed by revision, starting with the current publication.

1.1

Revision 12.0

The following is a summary of the changes in revision 11.0 of this document.

•

A note about SERDES_[01]_VDD supply was added to recommended operating conditions table.

See Table 4, page 7.

•

A note about VID was added to LVDS DC differential voltage specification. See Table 163, page 56.

•

Updated Table 286, page 113. Table 288, page 114, Table 289, page 115, Table 290, page 116,

Table 291, page 116, and Table 292, page 118.

•

Updated Table 297, page 121 with RX-CID details.

1.2

Revision 11.0

The following is a summary of the changes in revision 11.0 of this document.

•

Updated Table 24, page 23 with minimum and maximum values for input current low and high (SAR

73114 and 80314).

•

Added Non-Deterministic Random Bit Generator (NRBG) Characteristics, page 106 (SAR 73114

and 79517).

•

Added 060 device in Table 282, page 110 (SAR 79860).

•

Added DEVRST_N to Functional Times, page 116 (SAR 73114).

•

Added Cryptographic Block Characteristics, page 106 (SAR 73114 and 79516).

•

Update Table 296, page 120 with VTX-AMP details (SAR 81756).

•

Update note in Table 297, page 121 (SAR 74570 and 80677).

•

Update Table 298, page 121 with generic EPCS details (SAR 75307).

•

Added Table 308, page 128 (SAR 50424).

1.3

Revision 10.0

The following is a summary of the changes in revision 10.0 of this document.

•

The Surge Current on VDD during DEVRST_B Assertion and Surge Current on VDD during Digest

Check using System Services tables were deleted and added reference to AC393: Board Design

Guidelines for SmartFusion2 SoC and IGLOO2 FPGAs Application Note. (SAR 76865 and 76623).

•

Added 060 device in Table 4, page 7 (SAR 76383).

•

Updated Table 24, page 23 for ramp time input (SAR 72103).

•

Added 060 device details in Table 284, page 111 (SAR 74927).

•

Updated Table 290, page 116 for name change (SAR 74925).

•

Updated Table 283, page 111 for 060 FG676 Package details (SAR 78849).

•

Updated Table 305, page 125 for SmartFusion2 and Table 310, page 128 for IGLOO2 for SPI timing

and Fmax (SAR 56645, 75331).

•

Updated Table 293, page 119 for Flash*Freeze entry and exit times (SAR 75329, 75330).

•

Updated Table 297, page 121 for RX-CID information (SAR 78271).

•

Added Table 8, page 9 and Figure 1, page 10 (SAR 78932).

•

Updated Table 223, page 76 for timing characteristics and Table 224, page 77(SAR 75998).

•

Added SRAM PUF, page 105 (SAR 64406).

•

Added a footnote on digest cycle in Table 5, page 8 (SAR 79812).

1.4

Revision 9.0

The following is a summary of the changes in revision 9.0 of this document.

•

Added a note in Table 5, page 8 (SAR 71506).

•

Added a note in Table 6, page 9 (SAR 74616).

•

Added a note in Figure 3, page 18 (SAR 71506).

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