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DS0128 Datasheet(PDF) 59 Page - Microsemi Corporation

Part # DS0128
Description  IGLOO2 FPGA and SmartFusion2 SoC FPGA
PDF  140 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

DS0128 Datasheet(HTML) 59 Page - Microsemi Corporation

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IGLOO2 FPGA and SmartFusion2 SoC FPGA
Microsemi Proprietary and Confidential DS0128 Datasheet Revision 12.0
49
2.3.6.5 Stub-Series Terminated Logic 1.5 V (SSTL15)
SSTL15 Class I and Class II are supported in IGLOO2 FPGAs and SmartFusion2 SoC FPGAs, and also
comply with the reduced and full drive double data rate (DDR3) standard. IGLOO2 FPGA and
SmartFusion2 SoC FPGA I/Os supports both standards for single-ended signaling and differential
signaling for SSTL18. This standard requires a differential amplifier input buffer and a push-pull output
buffer.
Minimum and Maximum DC/AC Input and Output Levels Specification
The following table lists the SSTL15 DC voltage specifications for DDRIO bank.
Note: To meet JEDEC electrical compliance, use DDR3 full drive transmitter.
Table 129 • SSTL15 DC Recommended DC Operating Conditions (for DDRIO I/O Bank Only)
Parameter
Symbol
Min
Typ
Max
Unit
Supply voltage
VDDI
1.425
1.5
1.575
V
Termination voltage
VTT
0.698
0.750
0.803
V
Input reference voltage
VREF
0.698
0.750
0.803
V
Table 130 • SSTL15 DC Input Voltage Specification (for DDRIO I/O Bank Only)
Parameter
Symbol
Min
Max
Unit
DC input logic high
VIH(DC)
VREF + 0.1
1.575
V
DC input logic low
VIL(DC)
–0.3
VREF – 0.1
V
Input current high1
1.
See Table 24, page 23.
IIH (DC)
Input current low1
IIL (DC)
Table 131 • SSTL15 DC Output Voltage Specification (for DDRIO I/O Bank Only)
Parameter
Symbol
Min
Max
Unit
DDR3/SSTL15 Class I (DDR3 Reduced Drive)
DC output logic high
VOH
0.8 × VDDI
V
DC output logic low
VOL
0.2 × VDDI
V
Output minimum source DC
current
IOH at VOH
6.5
mA
Output minimum sink current
IOL at VOL
–6.5
mA
DDR3/SSTL15 Class II (DDR3 Full Drive)
DC output logic high
VOH
0.8 × VDDI
V
DC output logic low
VOL
0.2 × VDDI
V
Output minimum source DC
current
IOH at VOH 7.6
mA
Output minimum sink current
IOL at VOL
–7.6
mA
Table 132 • SSTL15 DC Differential Voltage Specification (for DDRIO I/O Bank Only)
Parameter
Symbol
Min
Unit
DC input differential voltage
VID
0.2
V



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