DS0128 datasheet(48/140 Pages) MICROSEMI

48 / 140 page

IGLOO2 FPGA and SmartFusion2 SoC FPGA

Microsemi Proprietary and Confidential DS0128 Datasheet Revision 12.0

Note: For a detailed I/V curve, use the corresponding IBIS models:

www.microsemi.com/soc/download/ibis/default.aspx.

AC Switching Characteristics

Worst commercial-case conditions: TJ = 85 °C, VDD = 1.14 V, VDDI = 1.14 V

Table 77 •

LVCMOS 1.2 V AC Calibrated Impedance Option

Parameter

Symbol

Typ

Unit

Supported output driver calibrated

impedance (for DDRIO I/O bank)

RODT_CAL

75, 60, 50, 40



Table 78 •

LVCMOS 1.2 V AC Test Parameter Specifications

Parameter

Symbol

Typ

Unit

Measuring/trip point

VTRIP

0.6

Resistance for enable path (TZH, TZL, THZ, TLZ)RENT



Capacitive loading for enable path (TZH, TZL, THZ, TLZ)

CENT

5pF

Capacitive loading for data path (TDP)CLOAD

5pF

Table 79 •

LVCMOS 1.2 V Transmitter Drive Strength Specifications

Output Drive Selection

VOH (V)

VOL (V)

IOH (at VOH)

IOL (at VOL)

MSIO I/O Bank MSIOD I/O Bank DDRIO I/O Bank

Min

Max

2 mA

VDDI × 0.75 VDDI × 0.25 2

4 mA

VDDI × 0.75 VDDI × 0.25 4

6 mA

VDDI × 0.75 VDDI × 0.25 6

Table 80 •

LVCMOS 1.2 V Receiver Characteristics for DDRIO I/O Bank with Fixed Code (Input

Buffers)

On-Die Termination (ODT)

TPY

TPYS

Unit

–1

–Std

–1

–Std

None

2.448

2.88

2.466

2.901

Table 81 •

LVCMOS 1.2 V Receiver Characteristics for MSIO I/O Bank (Input Buffers)

On-Die Termination ODT)

TPY

TPYS

Unit

–1

–Std

–1

–Std

None

4.714

5.545

4.675

5.5

6.668

7.845

6.579

7.74

5.832

6.862

5.76

6.777

150

5.162

6.073

5.111

6.014

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