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DS0128 Datasheet(PDF) 41 Page - Microsemi Corporation |
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DS0128 Datasheet(HTML) 41 Page - Microsemi Corporation |
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41 / 140 page ![]() IGLOO2 FPGA and SmartFusion2 SoC FPGA Microsemi Proprietary and Confidential DS0128 Datasheet Revision 12.0 31 AC Switching Characteristics Worst commercial-case conditions: TJ = 85 °C, VDD = 1.14 V, VDDI = 1.71 V Table 53 • LVCMOS 1.8 V AC Calibrated Impedance Option Parameter Symbol Typ Unit Supported output driver calibrated impedance (for DDRIO I/O bank) Rodt_cal 75, 60, 50, 33, 25, 20 Table 54 • LVCMOS 1.8 V AC Test Parameter Specifications Parameter Symbol Typ Unit Measuring/trip point for data path VTRIP 0.9 V Resistance for enable path (TZH, TZL, THZ, TLZ)RENT 2k Capacitive loading for enable path (TZH, TZL, THZ, TLZ) CENT 5pF Capacitive loading for data path (TDP)CLOAD 5pF Table 55 • LVCMOS 1.8 V Transmitter Drive Strength Specifications Output Drive Selection VOH (V) VOL (V) IOH (at VOH) mA IOL (at VOL) mA MSIO I/O Bank MSIOD I/O Bank DDRIO I/O Bank Min Max 2 mA 2 mA 2 mA VDDI – 0.45 0.45 2 2 4 mA 4 mA 4 mA VDDI – 0.45 0.45 4 4 6 mA 6 mA 6 mA VDDI – 0.45 0.45 6 6 8 mA 8 mA 8 mA VDDI – 0.45 0.45 8 8 10 mA 10 mA 10 mA VDDI – 0.45 0.45 10 10 12 mA 12 mA VDDI – 0.45 0.45 12 12 16 mA1 1. 16 mA drive strengths, all slews, meets LPDDR JEDEC electrical compliance. VDDI – 0.45 0.45 16 16 Table 56 • LVCMOS 1.8 V Receiver Characteristics (Input Buffers) On-Die Termination (ODT) TPY TPYS Unit –1 –Std –1 –Std LVCMOS 1.8 V (for DDRIO I/O bank with Fixed Codes) None 1.968 2.315 2.099 2.47 ns LVCMOS 1.8 V (for MSIO I/O bank) None 2.898 3.411 2.883 3.393 ns 50 3.05 3.59 3.044 3.583 ns 75 2.999 3.53 2.987 3.516 ns 150 2.947 3.469 2.933 3.452 ns LVCMOS 1.8 V (for MSIOD I/O bank) None 2.611 3.071 2.598 3.057 ns 50 2.775 3.264 2.775 3.265 ns 75 2.72 3.2 2.712 3.19 ns 150 2.666 3.137 2.655 3.123 ns |
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