DS0128 datasheet(16/140 Pages) MICROSEMI

16 / 140 page

IGLOO2 FPGA and SmartFusion2 SoC FPGA

Microsemi Proprietary and Confidential DS0128 Datasheet Revision 12.0

2.2

References

The following documents are recommended references:

•

PB0121: IGLOO2 Product Brief

•

DS0124: IGLOO2 Pin Descriptions

•

PB0115: SmartFusion2 SoC FPGA Product Brief

•

DS0115: SmartFusion2 Pin Descriptions

All product documentation for IGLOO2 and SmartFusion2 is available at:

http://www.microsemi.com/products/fpga-soc/fpga/igloo2-fpga

http://www.microsemi.com/products/fpga-soc/soc-fpga/smartfusion2#overview

2.3

Electrical Specifications

2.3.1

Operating Conditions

The following table lists the stress limits. Stress applied above the specified limit may cause permanent

damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect

device reliability.

Absolute maximum ratings are stress ratings only; functional operation of the device at these or any

other conditions beyond those listed under the recommended operating conditions specified in the

following table are not implied.

Table 3 •

Absolute Maximum Ratings

Parameter

Symbol

Min

Max

Unit

DC core supply voltage. Must always power this pin.

VDD

–0.3

1.32

Power supply for charge pumps (for normal operation

and programming). Must always power this pin.

VPP

–0.3

3.63

Analog power pad for MDDR PLL

MSS_MDDR_PLL_VDDA

–0.3

3.63

Analog power pad for MDDR PLL

HPMS_MDDR_PLL_VDDA

–0.3

3.63

Analog power pad for FDDR PLL

FDDR_PLL_VDDA

–0.3

3.63

Analog power pad for MDDR PLL

PLL0_PLL1_MSS_MDDR_VDDA

–0.3

3.63

Analog power pad for MDDR PLL

PLL0_PLL1_HPMS_MDDR_VDDA –0.3

3.63

Analog power pad for PLL0–5

CCC_XX[01]_PLL_VDDA

–0.3

3.63

High supply voltage for PLL SerDes[01]

SERDES_[01]_PLL_VDDA

–0.3

3.63

Analog power for SerDes[01] PLL lane0 to lane3.

This is a 2.5 V SerDes internal PLL supply.

SERDES_[01]_L[0123]_VDDAPLL –0.3

2.75

TX/RX analog I/O voltage. Low voltage power for the

lanes of SerDesIF0. This is a 1.2 V SerDes PMA supply.

SERDES_[01]_L[0123]_VDDAIO

–0.3

1.32

PCIe/PCS power supply

SERDES_[01]_VDD

–0.3

1.32

DC FPGA I/O buffer supply voltage for MSIO I/O bank

VDDIx

–0.3

3.63

DC FPGA I/O buffer supply voltage for MSIOD/DDRIO

I/O banks

VDDIx

–0.3

2.75

I/O Input voltage for MSIO I/O bank

–0.3

3.63

I/O Input voltage for MSIOD/DDRIO I/O bank

–0.3

2.75

Analog sense circuit supply of embedded nonvolatile

memory (eNVM). Must be shorted to VPP.

VPPNVM

–0.3

3.63

Storage temperature1

TSTG

–65

150

°C

Junction temperature

–55

135

°C

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