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DS0128 Datasheet(PDF) 71 Page - Microsemi Corporation |
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DS0128 Datasheet(HTML) 71 Page - Microsemi Corporation |
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71 / 140 page ![]() IGLOO2 FPGA and SmartFusion2 SoC FPGA Microsemi Proprietary and Confidential DS0128 Datasheet Revision 12.0 61 2.3.7.4 Mini-LVDS Mini-LVDS is an unidirectional interface from the timing controller to the column drivers and is designed to the Texas Instruments Standard SLDA007A. Mini-LVDS Minimum and Maximum Input and Output Levels Table 192 • M-LVDS AC Switching Characteristics for Transmitter (for MSIO I/O Bank - Output and Tristate Buffers) TDP TZL TZH THZ TLZ Unit –1 –Std –1 –Std –1 –Std –1 –Std –1 –Std 2.258 2.656 2.348 2.762 2.334 2.746 2.123 2.497 2.125 2.5 ns Table 193 • Mini-LVDS Recommended DC Operating Conditions Parameter Symbol Min Typ Max Unit Supply voltage VDDI 2.375 2.5 2.625 V Table 194 • Mini-LVDS DC Input Voltage Specification Parameter Symbol Min Max Unit DC Input voltage VI 02.925 V Table 195 • Mini-LVDS DC Output Voltage Specification Parameter Symbol Min Typ Max Unit DC output logic high VOH 1.25 1.425 1.6 V DC output logic low VOL 0.9 1.075 1.25 V Table 196 • Mini-LVDS DC Differential Voltage Specification Parameter Symbol Min Max Unit Differential output voltage swing VOD 300 600 mV Output common mode voltage VOCM 1 1.4 V Input common mode voltage VICM 0.3 1.2 V Input differential voltage VID 100 600 mV Table 197 • Mini-LVDS Minimum and Maximum AC Switching Speed Parameter Symbol Max Unit Conditions Maximum data rate (for MSIO I/O bank) DMAX 520 Mbps AC loading: 2 pF / 100 differential load Maximum data rate (for MSIOD I/O bank) DMAX 700 Mbps AC loading: 2 pF / 100 differential load Table 198 • Mini-LVDS AC Impedance Specifications Parameter Symbol Typ Unit Termination resistance RT 100 |
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