AMD-766AC datasheet(66/96 Pages) AMD

66 / 96 page

Preliminary Information

23167B – March 2001

AMD-766

TM Peripheral Bus Controller Data Sheet

C3AB0: Audio Port Trap Mask Register

Configuration space; function 3; offset: B3-B0h. Default: 0707_010Fh. Read-write.

31:24

23:16

15:8

7:0

MASKAUD4

MASKAUD3

MASKAUD2

MASKAUD1

MASKAUD[4:1]. Address masks for the audio trap event. See C3AA8 for details.

C3AB4: PCMCIA Trap 1 and 2 IO Address Register

Configuration space; function 3; offset: B7-B4h. Default: 0000_0000h. Read-write.

C3AB4, C3AB8, C3ABC, and C3AC0 combine to specify the address for the PCMCIA1 and PCMCIA2 trap events.

These events may be used to generate an SMIs or SCIs or reload the system inactivity timer. The PCMCIA1 and

PCMCIA2 trap events occur when the following is true:

PCMCIA1:

( (AD[15:0] | MASKPIO1 == ADDRPIO1 | MASKPIO1) & (PCI IO space access) )

( (AD[31:10]| MASKPME1 == ADDRPME1 | MASKPME1) & (PCI memory space access) );

PCMCIA2:

( (AD[15:0] | MASKPIO2 == ADDRPIO2 | MASKPIO2) & (PCI IO space access) )

( (AD[31:10]| MASKPME2 == ADDRPME2 | MASKPME2) & (PCI memory space access) );

Where AD is the address phase of a PCI bus cycle. It is not necessary for the cycle to be targeted at the IC. The IO

space mask bits cover bits[7:0]. The memory space mask bits cover bits[17:10].

31:16

15:0

ADDRPIO2

ADDRPIO1

ADDRPIO1 and ADDRPIO2. IO address for the PCMCIA1 and PCMCIA2 trap events.

C3AB8: PCMCIA Trap 1 Memory Address Registers

Configuration space; function 3; offset: BB-B8h. Default: 0000_0000h. Read-write.

31:10

9:0

ADDRPME1

Reserved

ADDRPME1. Memory address for the PCMCIA1 trap event. See C3AB4 for details.

C3ABC: PCMCIA Trap 2 Memory Address Registers

Configuration space; function 3; offset: BF-BCh. Default: 0000_0000h. Read-write.

31:10

9:0

ADDRPME2

Reserved

ADDRPME2. Memory address for the PCMCIA2 trap event. See C3AB4 for details.

C3AC0: PCMCIA Trap Mask Registers

Configuration space; function 3; offset: C3-C0h. Default: 0000_0000h. Read-write.

31:24

23:16

15:8

7:0

MASKPME2

MASKPME1

MASKPIO2

MASKPIO1

MASKPME[1,2] and MASKPIO[1,2]. Address mask for the PCMCIA trap events. See C3AB4 for details.

AMD-766AC Datasheet(PDF) 66 Page - Advanced Micro Devices

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