UPD9971 datasheet(37/112 Pages) RENESAS

37 / 112 page

µPD9971

Data Sheet S17455EJ2V0DS

5.1 Reference Voltage and Current Source Block

Figure 5-2 Voltage and Current Source

Band gap

referece

IREF

VREF

STREF

REGCNT

Regulator

REGCNT or STREF

This block has the following functions:

• Generates reference voltage by using a band gap and supplies the voltage to analog circuits, PLL, and the

regulator.

• Generates reference current by using the reference voltage as well as an external resistor and supplies the

current to PLL, the regulator, and all analog circuits.

• Receives power supply from AVDD.

The standby control of this block is controlled by the STNBY register.

To assert the internal regulator, reference voltage supplied from a part of this block is required. The REGCNT pin

controls the supply of the reference voltage. Thus, when using the regulator, be sure to supply 3.0 V power to both

REGVDD and AVDD.

The normal mode is set within 5 ms after this block is started (standby is released).

Cautions 1. Be sure to connect a 0.22

µF (± 20 %) capacitor between the VREF pin and AGND. Since

capacitors with the above capacitance affect the analog characteristics of the

µPD9971, place

the capacitor as close as possible to the VREF pin. Do not connect any other capacitors to

the VREF pin.

2. Be sure to connect a 56 k

Ω (± 5 %) resistor between the IREF pin and AGND. Do not connect

any other resistors to the IREF pin.

3. Note that output may be unstable if another analog block is started before this block is set to

the normal mode.

UPD9971 Datasheet(PDF) 37 Page - Renesas Technology Corp