UPD9971 datasheet(6/112 Pages) RENESAS

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µPD9971

Data Sheet S17455EJ2V0DS

PIN NAME

A0, A1:

Address

MSO:

Data Output for Melody Core

AGND:

Ground for Analog Block

N.C.:

No Connection

AGND2:

Ground for Analog Block

N.C.(index):

No Connection

ASI:

Audio Serial Data Input

PLLGND:

Ground for PLL

ASO:

Audio Serial Data Output

PLLVDD:

Power Supply for PLL

AVDD:

Power Supply for Analog Block

PO0 to PO3: Peripheral Output

BCLK:

Bit Clock Input/Output

PS:

Parallel/Serial Interface Select

CS_B:

Chip Select

RD_B:

Read

CSTRT:

Clock Select Signal Input from External

REGCNT:

Regulator Control

D0 to D7:

Data Bus

REGGND:

Ground for Regulator

Data:

Data

REGOUT:

Regulator Output

DGND:

Ground for Digital Block

REGUSE_B: Regulator Block Enable Signal Input

DVDD:

Power Supply for Digital Block

REGVDD:

Power Supply for Regulator

EGND:

Ground for I/O Pins

RESET_B:

Reset

EVDD:

Power Supply for I/O Pins

RXD:

Serial Data Input

INT_B:

Interruption

SCLK:

Clock for Serial I/F

IREF:

Current Reference for Analog Block

SCS:

Chip Select Input for Serial I/F

LED:

LED Control Output

SERINIT:

Initialization Signal for Serial I/F

LINOL:

Line Out (L-ch)

SPIMODE:

SPI Mode Select

LINOR:

Line Out (R-ch)

TM0 to TM2: Test Mode Input

LRCLK:

Left Right Clock Input/Output

TM3, TM4:

Test Mode I/O

MBCLK:

Bit Clock for Melody Core

TM5:

Test Mode Input

MCLK1:

Clock Input

TXD:

Serial Data Output

MCLK2:

Clock Input

VIB:

Vibration Control Output

MEN:

Frame Clock for Melody Core

VREF:

Voltage Reference for Analog Block

MSI:

Data Input for Melody Core

WR_B:

Write

UPD9971 Datasheet(PDF) 6 Page - Renesas Technology Corp

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