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UPD9971 Datasheet(PDF) 95 Page - Renesas Technology Corp

Part # UPD9971
Description  MOS INTEGRATED CIRCUIT
PDF  112 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD9971 Datasheet(HTML) 95 Page - Renesas Technology Corp

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µPD9971
Data Sheet S17455EJ2V0DS
93
9.5.3 Parallel CPU interface
Timing requirements (EVDD = 1.8 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
RD_B width
twRD
100
ns
WR_B width
twWR
40
ns
RD_B recovery time
trcRD
During read access to the sound generator
register
30
ns
WR_B recovery time
trcWR
During write access to registers of control
register bank
80
ns
Data setup time
tsuDI
WR_B
↑
50
ns
Data hold time
thDI
WR_B
↑
0
ns
A, CS_B setup time
tsuAW
WR_B
↑
50
ns
A, CS_B hold time
thAW
WR_B
↑
0
ns
A, CS_B setup time
tsuAR
RD_B
↓
0
ns
A, CS_B hold time
thAR
RD_B
↑
0
ns
Switching characteristics (EVDD = 1.8 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Data access time 1
taccDO
RD_B
↓, Isink = 1 mA
100
ns
Data hold time 1
tdDO
RD_B
↑, Isink = 1 mA
0
30
ns



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