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UPD9971 Datasheet(PDF) 66 Page - Renesas Technology Corp |
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UPD9971 Datasheet(HTML) 66 Page - Renesas Technology Corp |
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66 / 112 page  µPD9971 Data Sheet S17455EJ2V0DS 64 6.15 Digital Volume (ASI Input R-ch) Setting for Audio DAC (AURDG) This register performs setting for digital gain (ASI input R-ch). Address: 14H, register name: AURDG, block: Digital volume, access: R/W, initial value: FFH D7 D6 D5 D4 D3 D2 D1 D0 AURDG2[1:0] AURDG1[5:0] 6.15.1 AURDG2[1:0] Data Mode Initial Value Description AURDG2[1:0] 11b Performs setting for digital gain (ASI input R-ch) 6.15.2 AURDG1[5:0] Data Mode Initial Value Description AURDG1[5:0] 111111b Performs setting for digital gain (ASI input R-ch) Remark The setting value is derived from the sum of the corresponding gain setting values in Digital Gain Settings 1 and 2((Refer to Table 6-6 Digital Gain Settings 1, Table 6-7 Digital Gain Settings 2). Example When +10 dB is set: (+12 dB) + ( −2 dB) → 82H When 0 dB is set: (0 dB) + (0 dB) → 00H When −20 dB is set: (0 dB) + (−20 dB) → 14H When −60 dB is set: (0 dB) + (−60 dB) → 3H |
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