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UPD9971 Datasheet(PDF) 7 Page - Renesas Technology Corp |
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UPD9971 Datasheet(HTML) 7 Page - Renesas Technology Corp |
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7 / 112 page ![]() µPD9971 Data Sheet S17455EJ2V0DS 5 CONTENTS 1. FUNCTIONS...............................................................................................................................................9 1.1 General Descriptions of Functions................................................................................................9 1.2 General Descriptions of Circuits....................................................................................................9 2. PINS FUNCTIONS ..................................................................................................................................10 2.1 Pin Configuration...........................................................................................................................10 2.2 Recommended External Circuit ...................................................................................................11 2.3 Descriptions of Pin Functions......................................................................................................12 2.4 Connection of Unused Pins..........................................................................................................17 2.5 Pin Statuses ...................................................................................................................................18 3. CPU INTERFACE....................................................................................................................................21 3.1 Parallel Host CPU Interface ..........................................................................................................21 3.1.1 Write access........................................................................................................................................ 21 3.1.2 Read access........................................................................................................................................ 23 3.2 Serial Host Interface ......................................................................................................................24 3.2.1 Pin functions........................................................................................................................................ 24 3.2.2 Serial formats ...................................................................................................................................... 25 3.2.3 Access formats (3-wire SPI mode) ...................................................................................................... 26 3.2.4 Access formats (4-wire SPI mode) ...................................................................................................... 28 3.2.5 Initialization of serial interface ............................................................................................................. 30 4. MUSIC SERIAL INTERFACE ................................................................................................................31 4.1 Audio Serial Interface (ASIO)........................................................................................................31 4.2 Serial Interface Dedicated to Sound Generator Core External Connection (MSIO) ...............33 5. BLOCK FUNCTIONS..............................................................................................................................34 5.1 Reference Voltage and Current Source Block ............................................................................35 5.2 Regulator Block .............................................................................................................................36 5.3 PLL Block .......................................................................................................................................37 5.4 Sound Generator Core (Sound Generator/3D Positioning/Equalizer) Interface Block...........39 5.5 Audio Serial Interface Block (ASIO).............................................................................................40 5.6 Audio Playback and Digital Gain Adjustment Block ..................................................................42 5.7 Audio Playback Analog Block ......................................................................................................43 5.8 Digital Mixing Block.......................................................................................................................44 5.9 Serial Interface Dedicated to Sound Generator Core External Connection (MSIO) ...............46 6. REGISTERS (CONTROL REGISTER BANK)......................................................................................48 6.1 Standby Setting (STNBY)..............................................................................................................49 6.1.1 STADIG ............................................................................................................................................... 49 6.1.2 STPLL2 ............................................................................................................................................... 49 6.1.3 STPLL1 ............................................................................................................................................... 49 6.1.4 STASI .................................................................................................................................................. 49 6.1.5 STASO ................................................................................................................................................ 49 6.1.6 STSYNTH ........................................................................................................................................... 50 6.1.7 STADAC .............................................................................................................................................. 50 |
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