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UPD9971 Datasheet(PDF) 16 Page - Renesas Technology Corp

Part # UPD9971
Description  MOS INTEGRATED CIRCUIT
PDF  112 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD9971 Datasheet(HTML) 16 Page - Renesas Technology Corp

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µPD9971
Data Sheet S17455EJ2V0DS
14
(2/2)
Pin Name
Pin No.
I/O
Functions
1. Parallel I/F mode (when PS = 0)
Bit 0 for 8-bit host data bus
When the host CPU accesses
µPD9971, address and data I/O is performed.
When the CS_B signal in inactive (high), this pin is set to high impedance.
D0/(SERINT)
8K
I/O
2. Serial I/F mode (when PS = 1)
Initialization signal for serial I/F
1. Parallel I/F mode (when PS = 0)
Bits 7 -1 for 8-bit host data bus
When the host CPU accesses
µPD9971, address and data I/O is performed.
When the CS_B signal in inactive (high), this pin is set to high impedance.
D1 to D7
8J, 10H,
9H, 10G,
9G, 10F, 9F
I/O
2. Serial I/F mode (when PS = 1)
This bus is always set to high impedance
INT_B
10E
Output
Interrupt request from PCM sound generator
This signal requests interrupts from the
µPD9971 to the host CPU.
This is used when requesting data transfer or internal status notification.
PS
6B
Input
Parallel/serial I/F mode setting
This pin sets the parallel or serial mode of the host CPU interface.
1: Serial I/F mode
0: Parallel I/F mode
This pin has an internal pull-down resistor
(4) Audio serial interface pins (ASIO)
Pin Name
Pin No.
I/O
Functions
BCLK
8B
I/O
Bit synchronization clock I/O for audio serial
When this pin is not used, connect it to GND.
LRCLK
8A
I/O
Audio serial frame synchronization clock I/O
When this pin is not used, connect it to GND.
ASO
7B
Output
Audio serial data output
The audio serial data frame size is set via registers. During master mode, either
64 bits or 32 bits can be selected. During slave mode, selections can be made
in 2-bit steps within a range from 32 to 64 bits. Leave this pin open when not
used.
ASI
7A
Input
Audio serial data input
The audio serial data frame size is set via registers. During master mode, either
64 bits or 32 bits can be selected. During slave mode, selections can be made
in 2-bit steps within a range from 32 to 64 bits. Leave this pin open when not
used. Pull-down is performed internally.



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