ATAM894 datasheet(63/97 Pages) ATMEL

63 / 97 page

4679D–4BMCU–05/05

ATAM894

Deactivating the SSI (SIR = 1) in mid-telegram will immediately stop the shift clock and latch the

present contents of the shift register into the receive buffer. This can be used for clocking in a

data telegram of less than 8 bits in length. Care should be taken to read out the final complete

8-bit data telegram of a multiple word message before deactivating the SSI (SIR = 1) and termi-

nating the reception. After termination, the shift register contents will overwrite the receive

buffer.

Figure 6-40.

Example of an 8-bit Synchronous Transmit Operation

Figure 6-41.

Example of an 8-bit Synchronous Receive Operation

76543 21

7 6 5 43 210 7 6 54 321

msb

lsb

tx data 1

tx data 2

tx data 3

msb

lsb msb

lsb

Write STB

(tx data 2)

Write STB

(tx data 3)

Write STB

(tx data 1)

SIR

SRDY

Interrupt

(IFN = 0)

Interrupt

(IFN = 1)

ACT

43 2 1 0

7 65 4 3 2 1 0

msb

lsb

rx data 1

rx data 2

rx data 3

msb

lsb

msb

lsb

Read SRB

(rx data 2)

Read SRB

(rx data 3)

Read SRB

(rx data 1)

SIR

SRDY

Interrupt

(IFN = 0)

Interrupt

(IFN = 1)

ACT

76 5

4 32 1 0

7 6 5

7654

ATAM894 Datasheet(PDF) 63 Page - ATMEL Corporation

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