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PM3350-SW Datasheet(PDF) 144 Page - PMC-Sierra, Inc |
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PM3350-SW Datasheet(HTML) 144 Page - PMC-Sierra, Inc |
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144 / 224 page ![]() ELAN 8X10 PM3350 ELAN 8 X10 DATA SHEET PMC-970109 ISSUE 3 8 PORT ETHERNET SWITCH PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND PMC-SIERRA, INC. CUSTOMERS ONLY 142 Default Byte Ordering Byte 0 01243567 Byte 1 01243567 Byte 2 01243567 Byte 3 01243567 Byte 4 01243567 Byte 4 76543210 Byte 3 Byte 2 Byte 1 Byte 0 76543210 76543210 76543210 76543210 Byte 7 Byte 6 Byte 5 76543210 76543210 76543210 increasing time increasing time Ethernet/802.3 Frame PCI Bus DWords NextPointer Size AD31 AD0 Unused Count . . . To permit interfacing of non-ELAN 8x10 devices via the PCI bus, this byte ordering scheme may be selectively modified using the MWBE, MRBE, SWBE, SRBE and EPBE byte swap enable bits in the host control register. The MWBE and MRBE bits control the PCI bus master, and cause all data (payload and header information for packet buffers, as well as data descriptor contents) to be statically byte-swapped prior to writing them to or reading them from a PCI bus slave (i.e., as a result of DMA Controller transfers). Similarly, the SWBE and SRBE bits force the PCI bus slave logic in the ELAN 8x10 to swap data words written to and read from internal registers and memory by an external master. Finally, the EPBE bit, if set, disables the big-endian to little-endian conversion performed on the Ethernet frame information by the MAC interfaces, without affecting the byte ordering of the rest of the data structures or the packet buffer headers. When the EPBE bit is set, the alternate byte ordering scheme used is shown in the figure below (assuming that the MWBE, MRBE, SWBE and SRBE bits retain their default values): |
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