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PM3350-SW Datasheet(PDF) 159 Page - PMC-Sierra, Inc |
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PM3350-SW Datasheet(HTML) 159 Page - PMC-Sierra, Inc |
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159 / 224 page ![]() ELAN 8X10 PM3350 ELAN 8 X10 DATA SHEET PMC-970109 ISSUE 3 8 PORT ETHERNET SWITCH PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND PMC-SIERRA, INC. CUSTOMERS ONLY 157 master needs access to the PCI bus. The PM3350 has no specific requirements in this regard; this register always returns zero. Register 0x40: Merror / Mrd / Max. Burst Length Bit Type Function Default Bit 31 to 25 R Reserved 0x00 Bit 24 R/W TestDiscardTimer 0 Bit 23 to 16 R/W Tdiscon 0x6E Bit 15 to 10 R Reserved 0x00 Bit 9 R Mrd 0 Bit 8 R Merror 0 Bit 7 to 0 R/W MaxBurstLen[7:0] 0x10 MaxBurstLen[7:0]: This register should be initialized with the maximum single-transaction burst length in DWORDs to be used by the PCI bus master. It defaults to 16 DWORDS. Merror: A logic one in this bit position indicates that the PCI bus master has encountered a fatal error. Mrd: A logic one in this bit position indicates that the PCI bus master is currently performing a read transaction. Tdiscon: The slave timer disconnect register is used to limit TRDY and STOP assertion based on the value in this register. Tdiscon[3:0] sets the disconnect delay for the first data access, while Tdiscon[7:4] defines the disconnect delay for subsequent data phases of the same burst. Note that the actual number of cycles, as measured from the start of the data phase to the cycle in which the disconnect is returned by the PCI bus slave interface, is two greater than the numeric values programmed into the Tdiscon[3:0] and Tdiscon[7:4] fields. This register is for factory configuration purposes only. The value defaults to 0x6E (disconnect after 16 cycles on the first access and 8 cycles thereafter), and must remain at that value for correct operation. TestDiscardTimer: This register bit allows testing of the Discard Timer feature in the PCI bus slave logic. It defaults to zero. If set to logic 1, it causes the Discard Timer in the slave to be initialized to 0x2FF0 rather than 0x0000. This bit is for factory test purposes only. It must remain at logic 0 for correct operation. |
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