PM7375-SC datasheet(208/430 Pages) PMC

208 / 430 page

PM7375 LASAR-155

DATA SHEET

PMC-931127

ISSUE 6

LOCAL ATM SAR & PHYSICAL LAYER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

192

10.1.87

Bit

Type

Function

Default

Bit 15

R/W

UVPI/VCIE

Bit 14

R/W

CRC10E

Bit 13

R/W

NZCPIE

Bit 12

R/W

SDULE

Bit 11

R/W

CRC32E

Bit 10

R/W

OVPDUE

Bit 9

R/W

Reserved

Bit 8

R/W

F5OAMDE

Bit 7

R/W

PTIDE

Bit 6

R/W

RSOCE

Bit 5

Unused

Bit 4

Unused

Bit 3

R/W RESEM_ACTE

Bit 2

R/W

CEXOVE

Bit 1

R/W

PDUABE

Bit 0

Unused

The RALP Interrupt Enable register is used to control the generation of interrupt

from the RALP block.

UVPI/VCIE, CRC10E, NZCPIE, SDULE, CRC32E, OVPDUE, F5OAMDE,

PTIDE, RSOCE, RESEM_ACTE, CEXOVE, PDUABE:

The listed enable bits control interrupt generation by the corresponding interrupt

bits in the RALP Interrupt Status register. When the enable bit is set to logic one,

the corresponding interrupt will generate either a microprocessor interrupt or a

PCI Host interrupt as determined by the MPENB input.

PM7375-SC Datasheet(PDF) 208 Page - PMC-Sierra, Inc

PM7375-SC Datasheet(HTML) 208 Page - PMC-Sierra, Inc

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