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PM7375-SC Datasheet(PDF) 221 Page - PMC-Sierra, Inc |
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PM7375-SC Datasheet(HTML) 221 Page - PMC-Sierra, Inc |
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221 / 430 page ![]() PM7375 LASAR-155 DATA SHEET PMC-931127 ISSUE 6 LOCAL ATM SAR & PHYSICAL LAYER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 205 10.1.96 Register 0x90 (0x240): TATS Control/Interrupt Enable Bit Type Function Default Bit 15 R/W QSTARV_EN 0 Bit 14 R/W AGR_CBRC_EN 0 Bit 13 Unused X Bit 12 Unused X Bit 11 Unused X Bit 10 Unused X Bit 9 Unused X Bit 8 Unused X Bit 7 R/W CBS_CNT[7] 1 Bit 6 R/W CBS_CNT[6] 1 Bit 5 R/W CBS_CNT[5] 1 Bit 4 R/W CBS_CNT[4] 1 Bit 3 R/W CBS_CNT[3] 1 Bit 2 R/W CBS_CNT[2] 1 Bit 1 R/W CBS_CNT[1] 1 Bit 0 R/W CBS_CNT[0] 1 The TATS Control/Interrupt Enable register is used to configure and control the TATS block. CBS_CNT[7:0]: The CBS_CNT[7:0] bits indicate the Credit Basket Size for Credit Based Rate Control (CBRC) enforcement. VBR VCs are subject to peak cell rate and sustainable cell rate shaping as dictated by the TATS Service Rate Queues. In addition VBR VCs can also be constrained by an internal credit basket whose size is specified using the CBS_CNT value. Cell credits are expected to be generated by the downstream ATM entity and relayed to the LASAR-155 device using the GFC header field in receive ATM cells. Based on the reception of the appropriate GFC codepoint, the CBRC credit basket is topped off. Each cell transmitted on a VC with CBRC consumes a single credit regardless of the VC. Cells associated with CBRC VCs are only allowed to be sent if there is an available credit in the aggregate CBRC credit basket. If a credit is not available, transmission on CBRC VCs is quenched. AGR_CBRC_EN: The AGR_CBRC_EN bit enables aggregate CBRC VC traffic enforcement using the CBRC credit basket. When AGR_CBRC_EN is logic one, aggregate CBRC |
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