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TMPR3911 Datasheet(PDF) 192 Page - Toshiba Semiconductor |
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TMPR3911 Datasheet(HTML) 192 Page - Toshiba Semiconductor |
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192 / 462 page ![]() Chapter 7 CHI Module 7-18 ENCHI: This bit is used to enable/disable the CHI module. Setting this bit to a logic “1” enables the CHI module. Clearing this bit to a logic “0” disables the CHI Module and keeps the module in a reset state but gives no effect on the CHI Control Register. To begin the CHI operation, follow the procedure below. 1) Set up all the configuration registers except CHIRXEN, CHITXEN, ENDMARXCHI, ENDMATXCHI, and ENCHI bits. 2) Set either CHIRXEN or ENDMARXCHI, and/or, either CHITXEN or ENDMATXCHI, to a logic “1”. 3) Set ENCHI to a logic “1”. To finish the CHI operation. 1) Clear ENCHI to a logic “0”. 2) Clear ENDMARXCHI and/or ENDMATXCHI to a logic “0”, if they were previously set. 7.4.2 CHI Pointer Enable Register OFFSET = $1DC: Bit Label RESET Read/Write 31 CHITXPTRB3EN X R/W 30 CHITXPTRB2EN X R/W 29 CHITXPTRB1EN X R/W 28 CHITXPTRB0EN X R/W 27 CHITXPTRA3EN X R/W 26 CHITXPTRA2EN X R/W 25 CHITXPTRA1EN X R/W 24 CHITXPTRA0EN X R/W 23 CHIRXPTRB3EN X R/W 22 CHIRXPTRB2EN X R/W 21 CHIRXPTRB1EN X R/W 20 CHIRXPTRB0EN X R/W 19 CHIRXPTRA3EN X R/W 18 CHIRXPTRA2EN X R/W 17 CHIRXPTRA1EN X R/W 16 CHIRXPTRA0EN X R/W 15-0 Reserved X R/W CHITXPTRB3EN: This bit is used to enable/disable the timeslot for the transmit channel pointed to by the TDM switch pointer CHITXPTRB3. Setting this bit to a logic “1” enables the timeslot. Clearing this bit to a logic “0” disables the timeslot. CHITXPTRB2EN: This bit is used to enable/disable the timeslot for the transmit channel pointed to by the TDM switch pointer CHITXPTRB2. Setting this bit to a logic “1” enables the timeslot. Clearing this bit to a logic “0” disables the timeslot. CHITXPTRB1EN: This bit is used to enable/disable the timeslot for the transmit channel pointed to by the TDM switch pointer CHITXPTRB1. Setting this bit to a logic “1” enables the timeslot. Clearing this bit to a logic “0” disables the timeslot. |
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