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WM8991 Datasheet(PDF) 102 Page - Wolfson Microelectronics plc |
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WM8991 Datasheet(HTML) 102 Page - Wolfson Microelectronics plc |
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102 / 174 page ![]() WM8991 Pre-Production w PP, May 2008, Rev 3.1 102 Figure 53 Master Mode with ADCLRC as GPIO Figure 54 Slave Mode with ADCLRC as GPIO OPERATION WITH ALTERNATIVE DAC INTERFACE To allow data to be input to the WM8991 DACs from two separate sources, the GPIO[5:3] pins can be configured as an alternative DAC interface (BCLK2, DACLRC2, DACDAT2) as shown in Figure 57 to Figure 60. Figure 55 Interface 2 = Master Figure 56 Interface 2 = Slave WM8991 Processor #1 ADCDAT ADCLRC DACDAT DACLRC BCLK Processor #2 DACLRC2 DACDAT2 BCLK2 AIF_MSTR1=1 AIF_MSTR2=0 /N /N Figure 57 Interface 1 = Master, Interface 2 = Master Figure 58 Interface 1 = Master, Interface 2 = Slave |
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