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HD64F36049 Datasheet(PDF) 35 Page - Renesas Technology Corp |
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HD64F36049 Datasheet(HTML) 35 Page - Renesas Technology Corp |
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35 / 562 page  Section 1 Overview Rev. 3.00 Mar. 15, 2006 Page 3 of 526 REJ09B0060-0300 1.2 Internal Block Diagram P17/ IRQ3/TRGV P16/ IRQ2 P15/ IRQ1/TMIB1 P14/ IRQ0 P12 P11/PWM P10/TMOW P57/SCL P56/SDA P55/ WKP5/ADTRG P54/ WKP4 P53/ WKP3 P52/ WKP2 P51/ WKP1 P50/ WKP0 P24 P23 P22/TXD P21/RXD P20/SCK3 P87 P86 P85 P84/FTIOD P83/FTIOC P82/FTIOB P81/FTIOA P80/FTCI CPU H8/300H ROM RAM Data bus (lower) Data bus (upper) RTC 14-bit PWM Timer Z SCI3 IIC2 SCI3_2 Timer V Watchdog timer SCI3_3 A/D converter POR and LVD (option) P67/FTIOD1 P66/FTIOC1 P65/FTIOB1 P64/FTIOA1 P63/FTIOD0 P62/FTIOC0 P61/FTIOB0 P60/FTIOA0 P77 P76/TMOV P75/TMCIV P74/TMRIV P72/TXD_2 P71/RXD_2 P70/SCK3_2 P97 P96 P95 P94 P93 P92/TXD_3 P91/RXD_3 P90/SCK3_3 P37 P36 P35 P34 P33 P32 P31 P31 Subclock generator System clock generator Port B Timer W Timer B1 Address bus Figure 1.1 Internal Block Diagram |
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