HD64F36049 datasheet(66/562 Pages) RENESAS

Part #	HD64F36049

Description	Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Tiny Series

PDF	562 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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Section 2 CPU

Rev. 3.00 Mar. 15, 2006 Page 34 of 526

REJ09B0060-0300

2.6.2

On-Chip Peripheral Modules

On-chip peripheral modules are accessed in two states or three states. The data bus width is 8 bits

or 16 bits depending on the register. For details on the data bus width and number of accessing

states of each register, refer to section 22, List of Registers. Registers with 16-bit data bus width

can be accessed by word size only. Registers with 8-bit data bus width can be accessed by byte or

word size. When a register with 8-bit data bus width is accessed by word size, access is completed

in two cycles. In two-state access, the operation timing is the same as that for on-chip memory.

Figure 2.10 shows the operation timing in the case of three-state access to an on-chip peripheral

module.

T1 state

Bus cycle

Internal

address bus

Internal

read signal

Internal

data bus

(read access)

Internal

write signal

Read data

Address

Internal

data bus

(write access)

T2 state

T3 state

Write data

φ or φ SUB

Figure 2.10 On-Chip Peripheral Module Access Cycle (3-State Access)

HD64F36049 Datasheet(PDF) 66 Page - Renesas Technology Corp