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HD64F36049 Datasheet(PDF) 11 Page - Renesas Technology Corp |
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HD64F36049 Datasheet(HTML) 11 Page - Renesas Technology Corp |
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11 / 562 page ![]() Rev. 3.00 Mar. 15, 2006 Page xi of xxxii Section 6 Power-Down Modes ............................................................................75 6.1 Register Descriptions .......................................................................................................... 75 6.1.1 System Control Register 1 (SYSCR1) ................................................................ 76 6.1.2 System Control Register 2 (SYSCR2) ................................................................ 77 6.1.3 Module Standby Control Register 1 (MSTCR1) ................................................ 79 6.1.4 Module Standby Control Register 2 (MSTCR2) ................................................ 80 6.2 Mode Transitions and States of LSI.................................................................................... 81 6.2.1 Sleep Mode ......................................................................................................... 84 6.2.2 Standby Mode ..................................................................................................... 84 6.2.3 Subsleep Mode.................................................................................................... 85 6.2.4 Subactive Mode .................................................................................................. 85 6.3 Operating Frequency in Active Mode................................................................................. 86 6.4 Direct Transition ................................................................................................................. 86 6.4.1 Direct Transition from Active Mode to Subactive Mode.................................... 86 6.4.2 Direct Transition from Subactive Mode to Active Mode.................................... 87 6.5 Module Standby Function................................................................................................... 87 Section 7 ROM ....................................................................................................89 7.1 Block Configuration ........................................................................................................... 90 7.2 Register Descriptions .......................................................................................................... 91 7.2.1 Flash Memory Control Register 1 (FLMCR1).................................................... 91 7.2.2 Flash Memory Control Register 2 (FLMCR2).................................................... 92 7.2.3 Erase Block Register 1 (EBR1) .......................................................................... 93 7.2.4 Flash Memory Power Control Register (FLPWCR) ........................................... 94 7.2.5 Flash Memory Enable Register (FENR) ............................................................. 94 7.3 On-Board Programming Modes.......................................................................................... 95 7.3.1 Boot Mode .......................................................................................................... 95 7.3.2 Programming/Erasing in User Program Mode.................................................... 98 7.4 Flash Memory Programming/Erasing ............................................................................... 100 7.4.1 Program/Program-Verify .................................................................................. 100 7.4.2 Erase/Erase-Verify............................................................................................ 103 7.4.3 Interrupt Handling when Programming/Erasing Flash Memory....................... 103 7.5 Program/Erase Protection ................................................................................................. 105 7.5.1 Hardware Protection ......................................................................................... 105 7.5.2 Software Protection........................................................................................... 105 7.5.3 Error Protection................................................................................................. 105 7.6 Programmer Mode ............................................................................................................ 106 7.7 Power-Down States for Flash Memory............................................................................. 106 |
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