HD64F36049 datasheet(87/562 Pages) RENESAS

Part #	HD64F36049

Description	Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Tiny Series

PDF	562 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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Section 3 Exception Handling

Rev. 3.00 Mar. 15, 2006 Page 55 of 526

REJ09B0060-0300

3.4

Interrupt Exception Handling

3.4.1

External Interrupts

As the external interrupts, there are NMI, IRQ3 to IRQ0, and WKP5 to WKP0 interrupts.

NMI Interrupt:

NMI interrupt is requested by input signal edge to pin

NMI. This interrupt is detected by either

rising edge sensing or falling edge sensing, depending on the setting of bit NMIEG in IEGR1.

NMI is the highest-priority interrupt, and can always be accepted without depending on the I bit

value in CCR.

IRQ3 to IRQ0 Interrupts:

IRQ3 to IRQ0 interrupts are requested by input signals to pins

IRQ3 to IRQ0. These four

interrupts are given different vector addresses, and are detected individually by either rising edge

sensing or falling edge sensing, depending on the settings of bits IEG3 to IEG0 in IEGR1.

When pins

IRQ3 to IRQ0 are designated for interrupt input in PMR1 and the designated signal

edge is input, the corresponding bit in IRR1 is set to 1, requesting the CPU of an interrupt. These

interrupts can be masked by setting bits IEN3 to IEN0 in IENR1.

HD64F36049 Datasheet(PDF) 87 Page - Renesas Technology Corp