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HD64F36049 Datasheet(PDF) 24 Page - Renesas Technology Corp |
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HD64F36049 Datasheet(HTML) 24 Page - Renesas Technology Corp |
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24 / 562 page  Rev. 3.00 Mar. 15, 2006 Page xxiv of xxxii Figure 14.3 Timer Z (Channel 1) Block Diagram ...................................................................... 217 Figure 14.4 Example of Outputs in Reset Synchronous PWM Mode and Complementary PWM Mode............................................................................................................. 224 Figure 14.5 Accessing Operation of 16-Bit Register (between CPU and TCNT (16 bits))........ 236 Figure 14.6 Accessing Operation of 8-Bit Register (between CPU and TSTR (8 bits)) ............ 236 Figure 14.7 Example of Counter Operation Setting Procedure .................................................. 237 Figure 14.8 Free-Running Counter Operation............................................................................ 238 Figure 14.9 Periodic Counter Operation..................................................................................... 239 Figure 14.10 Count Timing at Internal Clock Operation............................................................ 239 Figure 14.11 Count Timing at External Clock Operation (Both Edges Detected)...................... 240 Figure 14.12 Example of Setting Procedure for Waveform Output by Compare Match............ 241 Figure 14.13 Example of 0 Output/1 Output Operation ............................................................. 242 Figure 14.14 Example of Toggle Output Operation ................................................................... 243 Figure 14.15 Output Compare Timing ....................................................................................... 243 Figure 14.16 Example of Input Capture Operation Setting Procedure ....................................... 244 Figure 14.17 Example of Input Capture Operation .................................................................... 245 Figure 14.18 Input Capture Signal Timing................................................................................. 246 Figure 14.19 Example of Synchronous Operation Setting Procedure ........................................ 247 Figure 14.20 Example of Synchronous Operation...................................................................... 248 Figure 14.21 Example of PWM Mode Setting Procedure .......................................................... 249 Figure 14.22 Example of PWM Mode Operation (1) ................................................................. 250 Figure 14.23 Example of PWM Mode Operation (2) ................................................................. 251 Figure 14.24 Example of PWM Mode Operation (3) ................................................................. 252 Figure 14.25 Example of PWM Mode Operation (4) ................................................................. 253 Figure 14.26 Example of Reset Synchronous PWM Mode Setting Procedure........................... 255 Figure 14.27 Example of Reset Synchronous PWM Mode Operation (OLS0 = OLS1 = 1) ...... 256 Figure 14.28 Example of Reset Synchronous PWM Mode Operation (OLS0 = OLS1 = 0) ...... 257 Figure 14.29 Example of Complementary PWM Mode Setting Procedure................................ 259 Figure 14.30 Canceling Procedure of Complementary PWM Mode.......................................... 260 Figure 14.31 Example of Complementary PWM Mode Operation (1) ...................................... 261 Figure 14.32 (1) Example of Complementary PWM Mode Operation (TPSC2 = TPSC1 = TPSC0 = 0) (2)................................................................ 263 Figure 14.32 (2) Example of Complementary PWM Mode Operation (TPSC2 = TPSC1 = TPSC0 ≠ 0) (3)................................................................ 264 Figure 14.33 Timing of Overshooting ........................................................................................ 265 Figure 14.34 Timing of Undershooting ...................................................................................... 265 Figure 14.35 Compare Match Buffer Operation......................................................................... 268 Figure 14.36 Input Capture Buffer Operation............................................................................. 269 Figure 14.37 Example of Buffer Operation Setting Procedure................................................... 269 |
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