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HD64F36049 Datasheet(PDF) 94 Page - Renesas Technology Corp |
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HD64F36049 Datasheet(HTML) 94 Page - Renesas Technology Corp |
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94 / 562 page ![]() Section 3 Exception Handling Rev. 3.00 Mar. 15, 2006 Page 62 of 526 REJ09B0060-0300 CCR I bit 1 Set port mode register bit Execute NOP instruction Interrupts masked. (Another possibility is to disable the relevant interrupt in interrupt enable register 1.) After setting the port mode register bit, first execute at least one instruction (e.g., NOP), then clear the interrupt request flag to 0. Interrupt mask cleared Clear interrupt request flag to 0 ← CCR I bit 0 ← Figure 3.4 Port Mode Register Setting and Interrupt Request Flag Clearing Procedure |
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