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SH7101 Datasheet(PDF) 77 Page - Renesas Technology Corp |
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SH7101 Datasheet(HTML) 77 Page - Renesas Technology Corp |
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77 / 486 page ![]() 3. MCU Operating Modes Rev.2.00 Sep. 27, 2007 Page 43 of 448 REJ09B0394-0200 Section 3 MCU Operating Modes 3.1 Selection of Operating Modes This LSI has one operating mode and four clock modes. The operating mode is determined by the setting of MD3 to MD0, and FWP pins. Do not change these pins during LSI operation (while power is on). Do not set these pins in the other way than the combination shown in table 3.1. This LSI supports only mode 3. Table 3.1 Selection of Operating Modes Pin Setting Mode No. FWP MD3 MD2 MD1 MD0 Mode Name On-Chip ROM Mode 3 1 x x 1 1 Single chip mode Active Note: The symbol x means “Don't care.” The clock mode is selected by the input of MD2 and MD3 pins. Table 3.2 Maximum Operating Clock Frequency for Each Clock Mode Pin Setting MD3 MD2 Maximum Operating Clock Frequency 0 0 10 MHz (Input clock × 1, maximum of input clock: 10 MHz) 0 1 20 MHz (Input clock × 2, maximum of input clock: 10 MHz) 1 0 40 MHz (Input clock × 4*, maximum of input clock: 10 MHz) 1 1 40 MHz (Input clock × 4 for system clock, Input clock × 2 for peripheral clock, maximum of input clock: 10 MHz) Note: * The maximum of input clock is 10 MHz so that P φ is lower or equal to 40 MHz. |
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