SH7101 datasheet(20/486 Pages) RENESAS

20 / 486 page

Rev.2.00 Sep. 27, 2007 Page xx of xxxiv

REJ09B0394-0200

12.4.1 Interrupt Sources................................................................................................... 347

12.4.2 Compare Match Flag Set Timing.......................................................................... 347

12.4.3 Compare Match Flag Clear Timing ...................................................................... 348

12.5

Usage Notes ....................................................................................................................... 349

12.5.1 Contention between CMCNT Write and Compare Match.................................... 349

12.5.2 Contention between CMCNT Word Write and Incrementation ........................... 350

12.5.3 Contention between CMCNT Byte Write and Incrementation ............................. 351

Section 13 Pin Function Controller (PFC) ........................................................353

13.1

Register Descriptions ......................................................................................................... 360

13.1.1 Port A I/O Register L (PAIORL).......................................................................... 360

13.1.2 Port A Control Registers L3 to L1 (PACRL3 to PACRL1).................................. 361

13.1.3 Port B I/O Register (PBIOR) ................................................................................ 364

13.1.4 Port B Control Registers 1 and 2 (PBCR1 and PBCR2)....................................... 365

13.1.5 Port E I/O Registers L and H (PEIORL and PEIORH)......................................... 366

13.1.6 Port E Control Registers L1, L2, and H (PECRL1, PECRL2, and PECRH) ........ 366

13.2

Usage Notes ....................................................................................................................... 370

13.2.1 Note on PFC Setting ............................................................................................. 370

13.2.2 Note on PFC Setting Order ................................................................................... 370

Section 14 I/O Ports...........................................................................................371

14.1

Port A .............................................................................................................................. 371

14.1.1 Register Description.............................................................................................. 372

14.1.2 Port A Data Register L (PADRL) ......................................................................... 372

14.2

Port B .............................................................................................................................. 374

14.2.1 Register Description.............................................................................................. 374

14.2.2 Port B Data Register (PBDR) ............................................................................... 374

14.3

Port E

.............................................................................................................................. 376

14.3.1 Register Descriptions ............................................................................................ 377

14.3.2 Port E Data Registers H and L (PEDRH and PEDRL) ......................................... 377

14.4

Port F

.............................................................................................................................. 379

14.4.1 Register Description.............................................................................................. 379

14.4.2 Port F Data Register (PFDR) ................................................................................ 379

14.5

Port G .............................................................................................................................. 381

14.5.1 Register Description.............................................................................................. 381

14.5.2 Port G Data Register (PGDR)............................................................................... 381

Section 15 Mask ROM ......................................................................................383

15.1

Usage Note......................................................................................................................... 383

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