SH7101 datasheet(19/486 Pages) RENESAS

19 / 486 page

Rev.2.00 Sep. 27, 2007 Page xix of xxxiv

REJ09B0394-0200

10.8.6 Cautions on Clocked Synchronous External Clock Mode .................................... 324

10.8.7 Caution on Clocked Synchronous Internal Clock Mode....................................... 324

Section 11 A/D Converter................................................................................. 325

11.1

Features .............................................................................................................................. 325

11.2

Input/Output Pins ............................................................................................................... 327

11.3

Register Descriptions ......................................................................................................... 328

11.3.1 A/D Data Registers 8 to 15 (ADDR8 to ADDR15) .............................................. 328

11.3.2 A/D Control/Status Registers_0 and _1 (ADCSR_0 and ADCSR_1) .................. 329

11.3.3 A/D Control Registers_0 and _1 (ADCR_0 and ADCR_1).................................. 330

11.3.4 A/D Trigger Select Register (ADTSR) ................................................................. 332

11.4

Operation............................................................................................................................ 333

11.4.1 Single Mode .......................................................................................................... 333

11.4.2 Continuous Scan Mode ......................................................................................... 333

11.4.3 Single-Cycle Scan Mode....................................................................................... 335

11.4.4 Input Sampling and A/D Conversion Time........................................................... 335

11.4.5 A/D Converter Activation by MTU ...................................................................... 337

11.4.6 External Trigger Input Timing .............................................................................. 337

11.5

Interrupt Sources ................................................................................................................ 338

11.6

Definitions of A/D Conversion Accuracy .......................................................................... 338

11.7

Usage Notes ....................................................................................................................... 340

11.7.1 Module Standby Mode Setting ............................................................................. 340

11.7.2 Permissible Signal Source Impedance .................................................................. 340

11.7.3 Influences on Absolute Accuracy ......................................................................... 340

11.7.4 Range of Analog Power Supply and Other Pin Settings ....................................... 341

11.7.5 Notes on Board Design ......................................................................................... 341

11.7.6 Notes on Noise Countermeasures ......................................................................... 341

Section 12 Compare Match Timer (CMT)........................................................ 343

12.1

Features .............................................................................................................................. 343

12.2

Register Descriptions ......................................................................................................... 344

12.2.1 Compare Match Timer Start Register (CMSTR) .................................................. 344

12.2.2 Compare Match Timer Control/Status Register_0 and _1

(CMCSR_0, CMCSR_1) ...................................................................................... 345

12.2.3 Compare Match Timer Counter_0 and _1 (CMCNT_0, CMCNT_1)................... 346

12.2.4 Compare Match Timer Constant Register_0 and _1 (CMCOR_0, CMCOR_1)... 346

12.3

Operation............................................................................................................................ 346

12.3.1 Cyclic Count Operation ........................................................................................ 346

12.3.2 CMCNT Count Timing......................................................................................... 347

12.4

Interrupts ............................................................................................................................ 347

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