SH7101 datasheet(151/486 Pages) RENESAS

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8. Multi-Function Timer Pulse Unit (MTU)

Rev.2.00 Sep. 27, 2007 Page 117 of 448

REJ09B0394-0200

Table 8.21

TIORL_3 (channel 3)

Description

Bit 3

IOC3

Bit 2

IOC2

Bit 1

IOC1

Bit 0

IOC0

TGRC_3

Function

TIOC3C Pin Function

Output disabled

Output

compare

Initial output is 0

0 output at compare match

Initial output is 0

1 output at compare match

Initial output is 0

Toggle output at compare match

Output disabled

Initial output is 1

0 output at compare match

Initial output is 1

1 output at compare match

Initial output is 1

Toggle output at compare match

Input capture at rising edge

Input capture at falling edge

Input

capture

Input capture at both edges

Legend:

X: Don't care

Note:

When the BFA bit in TMDR_3 is set to 1 and TGRC_3 is used as a buffer register, this

setting is invalid and input capture/output compare is not generated.

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